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CAT25256VI-T3

Description
EEPROM, 32KX8, Serial, CMOS, PDSO8, 0.150 INCH, GREEN, MS-012, SOIC-8
Categorystorage    storage   
File Size258KB,17 Pages
ManufacturerCatalyst
Websitehttp://www.catalyst-semiconductor.com/
Environmental Compliance
Download Datasheet Parametric View All

CAT25256VI-T3 Overview

EEPROM, 32KX8, Serial, CMOS, PDSO8, 0.150 INCH, GREEN, MS-012, SOIC-8

CAT25256VI-T3 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerCatalyst
Parts packaging codeSOIC
package instructionSOP,
Contacts8
Reach Compliance Codeunknown
ECCN codeEAR99
Maximum clock frequency (fCLK)5 MHz
JESD-30 codeR-PDSO-G8
JESD-609 codee3
length4.9 mm
memory density262144 bit
Memory IC TypeEEPROM
memory width8
Number of functions1
Number of terminals8
word count32768 words
character code32000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize32KX8
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialSERIAL
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height1.75 mm
Serial bus typeSPI
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)1.8 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
width3.9 mm
Maximum write cycle time (tWC)5 ms
CAT25256
256-Kb SPI Serial CMOS EEPROM
FEATURES
10 MHz SPI compatible
1.8V to 5.5V supply voltage range
SPI modes (0,0) & (1,1)
64-byte page write buffer
Self-timed write cycle
Hardware and software protection
Block write protection
– Protect 1/4, 1/2 or entire EEPROM array
Low power CMOS technology
1,000,000 program/erase cycles
100 year data retention
Industrial and Extended temperature range
RoHS-compliant 8 lead PDIP, SOIC, TSSOP and
8-pad TDFN packages
8-ball Chip Scale Package (CSP)
DESCRIPTION
The CAT25256 is a 256-Kb Serial CMOS EEPROM
device internally organized as 32Kx8 bits. This
features a 64-byte page write buffer and supports the
Serial Peripheral Interface (SPI) protocol. The device
¯¯
is enabled through a Chip Select (CS) input. In
addition, the required bus signals are clock input
(SCK), data input (SI) and data output (SO) lines. The
¯¯¯¯¯ input may be used to pause any serial
HOLD
communication with the CAT25256 device. The
device features software and hardware write protec–
tion, including partial as well as full array protection.
PIN CONFIGURATION
PDIP (L)
SOIC (V, X)
TSSOP (Y)
TDFN (ZD2)
¯¯
CS
SO
¯¯¯
WP
V
SS
1
2
3
4
8 V
CC
¯¯¯¯¯
7 HOLD
6 SCK
5 SI
V
CC
¯¯¯¯¯
HOLD
SCK
SI
CSP-8B
(Top View)
1
2
3
4
¯¯
8 CS
7 SO
6 ¯¯¯
WP
5 V
SS
FUNCTIONAL SYMBOL
V
CC
SI
CS
WP
HOLD
SCK
CAT25256
SO
V
SS
PIN FUNCTION
Pin Name
¯¯
CS
SO
¯¯¯
WP
V
SS
SI
SCK
¯¯¯¯¯
HOLD
V
CC
Function
Chip Select
Serial Data Output
Write Protect
Ground
Serial Data Input
Serial Clock
Hold Transmission Input
Power Supply
1
Doc. No. MD-1127 Rev. A
For Ordering Information details, see page 16.
© Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
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