A Business Partner of Renesas Electronics Corporation.
Preliminary
PS8551L4
ANALOG OUTPUT TYPE
OPTICAL COUPLED ISOLATION AMPLIFIER
DESCRIPTION
Data Sheet
R08DS0039EJ0200
Rev.2.00
Sep 06, 2011
and an IC with a high-accuracy D/A converter on the output side.
converter and a GaAIAs light-emitting diode with high-speed response and high luminance efficiency on the input side,
The PS8551L4 is designed specifically for high common mode transient immunity (CMTI) and high linearity (non-
The PS8551L4 is an optically coupled isolation amplifier that uses an IC with a high-accuracy sigma-delta A/D
linearity). The PS8551L4 is suitable for current sensing in motor drives.
FEATURES
• Non-linearity (NL200 = 0.35% MAX.)
• High common mode transient immunity (CMTI = 10 kV/
μ
s MIN.)
• Gain tolerance (G = 7.76 to 8.24 (±3%))
Gain: 8 V/V TYP.
• High isolation voltage (BV = 5 000 Vr.m.s.)
8
PIN CONNECTION
(Top View)
7
+
6
–
5
SHIELD
• Package: 8-pin DIP lead bending type (Gull-wing) for long creepage distance for
• Embossed tape product: PS8551L4-E3 : 1 000 pcs/reel
surface mount (L4)
1
2
3
4
1. V
DD
1
2. V
IN+
3. V
IN–
4. GND1
5. GND2
6. V
OUT–
7. V
OUT+
8. V
DD
2
+
• Safety standards
• Pb-Free product
• SEMKO approved: No. 1111155
• CSA approved: No. CA 101391 (CA5A, CAN/CSA-C22.2 60065, 60950)
• UL approved: No. E72422
• DIN EN60747-5-2 (VDE0884 Part2) approved: No. 40019182 (Option)
APPLICATIONS
• AC Servo, inverter
• Measurement equipment
The mark <R> shows major revised points.
The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.
R08DS0039EJ0200 Rev.2.00
Sep 06, 2011
Page 1 of 17
–
A Business Partner of Renesas Electronics Corporation.
PS8551L4
PACKAGE DIMENSIONS (UNIT: mm)
Lead Bending Type (Gull-wing) For Long Creepage Distance For Surface Mount (L4)
Chapter Title
9.25
–0.25
+0.5
10.05±0.4
1.01
–0.2
+0.4
6.5
–0.1
+0.5
0.2±0.15
0.5±0.15
2.54
0.62±0.25
PHOTOCOUPLER CONSTRUCTION
Parameter
Air Distance
Outer Creepage Distance
Isolation Distan ce
Unit (MIN.)
8 mm
8 mm
0.4 mm
R08DS0039EJ0200 Rev.2.00
Sep 06, 2011
3.7±0.35
3.5±0.2
Page 2 of 17
A Business Partner of Renesas Electronics Corporation.
PS8551L4
<R>
MARKING EXAMPLE
Chapter Title
No. 1 pin
Mark
R
8551
NT131
Company Initial
Type Number
Assembly Lot
N T 1 31
Week Assembled
Year Assembled
(Last 1 Digit)
In-house Code
(T: Pb-Free)
Rank Code
ORDERING INFORMATION
Part Number
PS8551L4
PS8551L4-E3
PS8551L4-V
PS8551L4-V-E3
Order Number
PS8551L4-AX
PS8551L4-E3-AX
PS8551L4-V-AX
PS8551L4-V-E3-AX
Solder Plating
Specification
Pb-Free
(Ni/Pd/Au)
Packing Style
Magazine case 50 pcs
Embossed Tape 1 000 pcs/reel
Magazine case 50 pcs
Embossed Tape 1 000 pcs/reel
Safety Standard
Approval
Standard products
(UL, CSA, SEMKO
approved)
DIN EN60747-5-2
(VDE0884 Part2)
Approved (Option)
Application Part
1
Number
*
PS8551L4
*1
For the application of the Safety Standard, following part number should be used.
R08DS0039EJ0200 Rev.2.00
Sep 06, 2011
Page 3 of 17
A Business Partner of Renesas Electronics Corporation.
PS8551L4
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C, unless otherwise specified)
Parameter
Operating Ambient Temperature
Storage Temperature
Supply Voltage
Input Voltage
2 Seconds Transient Input Voltage
Output Voltage
Isolation Voltage
*1
Chapter Title
Symbol
T
A
T
stg
V
DD
1, V
DD
2
V
IN+
, V
IN−
V
IN+
, V
IN−
V
OUT+
, V
OUT−
BV
Ratings
−40
to
＋85
−55
to＋125
0 to 5.5
−2
to V
DD
1＋0.5
−6
to V
DD
1＋0.5
−0.5
to V
DD
2＋0.5
5 000
Unit
°C
°C
V
V
V
V
Vr.m.s.
*1
AC voltage for 1 minute at T
A
= 25°C, RH = 60% between input and output.
Pins 1-4 shorted together, 5-8 shorted together.
RECOMMENDED OPERATING CONDITIONS
Parameter
Operating Ambient Temperature
Supply Voltage
Input Voltage
(Accurate and Linear)
*1
Symbol
T
A
V
DD
1, V
DD
2
V
IN+
, V
IN−
MIN.
−40
4.5
−200
MAX.
85
5.5
200
Unit
°C
V
mV
*1
Using V
IN−
= 0 V (to be connected to GND1) is recommended. Avoid using V
IN−
of 2.5 V or more, because the
internal test mode is activated when the voltage V
IN−
reaches more than 2.5 V.
R08DS0039EJ0200 Rev.2.00
Sep 06, 2011
Page 4 of 17
A Business Partner of Renesas Electronics Corporation.
PS8551L4
Chapter Title
ELECTRICAL CHARACTERISTICS (DC Characteristics)
(TYP.: T
A
= 25°C, V
IN+
= V
IN−
= 0 V, V
DD
1 = V
DD
2 = 5 V,
MIN., MAX.: refer to RECOMMENDED OPERATING CONDITIONS, unless otherwise specified)
Parameter
Input Offset Voltage
Symbol
V
os
T
A
= 25°C
Conditions
MIN.
−2
−3
Input Offset Voltage Drift
vs. Temperature
Gain
*1
TYP.
0.3
MAX.
2
3
Unit
mV
⏐dV
os
/dT
A
⏐
G
⏐dG/dT
A
⏐
*2
T
A
= 25 to +85°C
−200
mV
≤
V
IN+
≤
200 mV,
7.76
3
8
0.00087
10
8.24
μ
V/°C
V/V
V/V
°C
T
A
= 25°C
Gain Drift vs. Temperature
V
OUT
Non-linearity (200 mV)
vs. Temperature
NL200
⏐dNL200/dT
A
⏐
NL100
⏐V
IN+
⏐
MAX.
I
DD
1
I
DD
2
I
IN+
⏐dI
IN+
/dT
A
⏐
V
OL
V
OH
V
OCM
⏐I
OSC
⏐
R
IN
R
OUT
CMRR
IN
−200
mV
≤
V
IN+
≤
200 mV
0.021
0.0002
0.35
%
%/
°C
V
OUT
Non-linearity (200 mV) Drift
V
OUT
Non-linearity (100 mV)
Clipping
*2
−100
mV
≤
V
IN+
≤
100 mV
0.014
308
0.2
%
mV
Maximum Input Voltage before V
OUT
Input Supply Current
Output Supply Current
Input Bias Current
vs. Temperature
Input Bias Current Drift
Low Level Saturated Output Voltage
High Level Saturated Output Voltage
Output Voltage (V
IN+
= V
IN−
= 0 V)
Output Short-circuit Current
Equivalent Input Resistance
V
OUT
Output Resistance
V
IN+
= 400 mV
V
IN+
=
−
400 mV
V
IN+
= 0V
16
10
−0.5
0.45
20
16
5
mA
mA
μ
A
nA/
°C
V
V
V
IN+
=
−
400 mV
V
IN+
= 400 mV
V
IN+
= V
IN−
= 0 V
2.2
1.29
3.8
2.55
18.6
320
15
76
2.8
V
mA
k
Ω
Ω
dB
<R>
Ratio
Input DC Common-Mode Rejection
*3
*1
The differential output voltage (V
OUT+
−
V
OUT−
) with respect to the differential input voltage (V
IN+
−
V
IN−
), where V
IN+
=
the resulting chart, the gain is defined as the slope of the optimum line obtained by using the method of least
−200
mV to 200 mV and V
IN−
= 0 V) is measured under the circuit shown in
Fig. 2 NL200, G Test Circuit.
Upon
*2
The differential output voltage (V
OUT+
−
V
OUT−
) with respect to the differential input voltage (V
IN+
−
V
IN−
) is measured
squares.
using the method of least squares. Non-linearity is defined as the ratio (%) of the optimum line obtained by dividing
For example, if the differential output voltage is 3.2 V, and the peak to peak value of the (residual) deviation is 22.4
NL200 = 22.4/(2
×
3 200) = 0.35%
[Half of the peak to peak value of the (residual) deviation] by [full-scale differential output voltage].
under the circuit shown in
Fig. 2 NL200, G Test Circuit.
Upon the resulting chart, the optimum line is obtained by
mV, while the input V
IN+
is
±200
mV, the output non-linearity is obtained as follows:
*3
CMRR
IN
is defined as the ratio of the differential signal gain (when the differential signal is applied between the
value is indicated in dB.
input pins) to the common-mode signal gain (when both input pins are connected and the signal is applied). This
R08DS0039EJ0200 Rev.2.00
Sep 06, 2011
Page 5 of 17
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