K3N3U6000D-DC12 datasheet, PDF

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K3N3U6000D-DC12: DescriptionMASK ROM, 256KX16, 120ns, CMOS, PDIP40, 0.600 INCH, DIP-40; Categorystorage storage; File Size45KB，3 Pages; ManufacturerSAMSUNG; Websitehttp://www.samsung.com/Products/Semiconductor/

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K3N3U6000D-DC12 Overview

MASK ROM, 256KX16, 120ns, CMOS, PDIP40, 0.600 INCH, DIP-40

K3N3U6000D-DC12 Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	SAMSUNG
Parts packaging code	DIP
package instruction	DIP,
Contacts	40
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	120 ns
Other features	TTL COMPATIBLE I/O
JESD-30 code	R-PDIP-T40
JESD-609 code	e0
length	52.42 mm
memory density	4194304 bit
Memory IC Type	MASK ROM
memory width	16
Number of functions	1
Number of terminals	40
word count	262144 words
character code	256000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	256KX16
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	3.3 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	15.24 mm

K3N3U6000D-DC12 Preview

K3N3V(U)6000D-DC

4M-Bit (256Kx16) CMOS MASK ROM (EPROM TYPE)

FEATURES

•

262,144 x 16 bit organization

•

Fast access time

3.3V Operation : 100ns(Max.)

3.0V Operation : 120ns(Max.)

•

Supply voltage : single +3.0V/ single +3.3V

•

Current consumption

Operating : 25mA(Max.)

Standby : 30µA(Max.)

•

Fully static operation

•

All inputs and outputs TTL compatible

•

Three state outputs

•

Package

-. K3N3V(U)6000D-DC : 40-DIP-600

CMOS MASK ROM

GENERAL DESCRIPTION

The K3N3V(U)6000D-DC is a fully static mask programmable

ROM organized 262,144 x 16 bit. It is fabricated using silicon

gate CMOS process technology.

This device operates with 3.0V or 3.3V power supply, and all

inputs and outputs are TTL compatible.

Because of its asynchronous operation, it requires no external

clock assuring extremely easy operation.

It is suitable for use in program memory of microprocessor, and

data memory, character generator.

The K3N3V(U)6000D-DC is packaged in a 40-DIP.

FUNCTIONAL BLOCK DIAGRAM

PIN CONFIGURATION

BUFFERS

AND

DECODER

MEMORY CELL

MATRIX

(262,144x16)

N.C

40 V

39 A

38 A

37 A

BUFFERS

AND

DECODER

SENSE AMP.

BUFFERS

35 A

32 A

. . .

DIP

31 A

CONTROL

LOGIC

28 A

27 A

26 A

25 A

24 A

23 A

22 A

21 A

Pin Name

- A

- Q

N.C

Pin Function

Address Inputs

Data Outputs

Chip Enable

Output Enable

Power

Ground

No Connection

OE 20

K3N3V(U)6000D-DC

K3N3V(U)6000D-DC

ABSOLUTE MAXIMUM RATINGS

Item

Voltage on Any Pin Relative to V

Temperature Under Bias

Storage Temperature

Symbol

BIAS

STG

CMOS MASK ROM

Rating

-0.3 to +4.5

-10 to +85

-55 to +150

Unit

°C

NOTE

: Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the con-

ditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may

affect device reliability.

RECOMMENDED OPERATING CONDITIONS

(Voltage reference to V

, T

=0 to 70°C)

Item

Supply Voltage

Symbol

Min

2.7/3.0

Typ

3.0/3.3

Max

3.3/3.6

Unit

DC CHARACTERISTICS

Parameter

Operating Current

Standby Current(TTL)

Standby Current(CMOS)

Input Leakage Current

Output Leakage Current

Input High Voltage, All Inputs

Input Low Voltage, All Inputs

Output High Voltage Level

Output Low Voltage Level

Symbol

SB1

SB2

=-400µA

=2.1mA

Test Conditions

Cycle=5MHz, all outputs open, CE=OE=V

=0.45V to 2.4V (AC Test Condition)

CE=V

, all outputs open

CE=V

, all outputs open

=0 to V

OUT

=0 to V

=3.3±0.3V

=3.0±0.3V

Min

2.0

-0.3

2.4

Max

500

+0.3

0.6

0.4

Unit

µA

NOTE

: Minimum DC Voltage(V

) is -0.3V an input pins. During transitions, this level may undershoot to -2.0V for periods <20ns.

Maximum DC voltage on input pins(V

) is V

+0.3V which, during transitions, may overshoot to V

+2.0V for periods <20ns.

MODE SELECTION

Mode

Standby

Operating

Data

High-Z

Dout

Power

Standby

Active

CAPACITANCE

=25°C, f=1.0MHz)

Item

Output Capacitance

Input Capacitance

Symbol

OUT

Test Conditions

OUT

=0V

Min

Max

Unit

NOTE

: Capacitance is periodically sampled and not 100% tested.

K3N3V(U)6000D-DC

TEST CONDITIONS

Item

Input Pulse Levels

Input Rise and Fall Times

Input and Output timing Levels

Output Loads

CMOS MASK ROM

AC CHARACTERISTICS

=0°C to +70°C, V

=3.3V/3.0V±0.3V, unless otherwise noted.)

Value

0.45V to 2.4V

10ns

1.5V

1 TTL Gate and C

=100pF

READ CYCLE

Item

Read Cycle Time

Chip Enable Access Time

Address Access Time

Output Enable Access Time

Output or Chip Disable to

Output High-Z

Output Hold from Address Change

Symbol

ACE

=3.3V±0.3V

Min

100

Max

=3.0V±0.3V

Min

120

Max

Unit

TIMING DIAGRAM

READ

ADD

ADD1

ACE

ADD2

DF(Note)

OUT

VALID DATA

NOTE :

is defined as the time at which the outputs achieve the open circuit condition and is not referenced to V

or V

level.

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K3N3U6000D-DC12 Related Products

	K3N3U6000D-DC12	K3N3V6000D-DC10
Description	MASK ROM, 256KX16, 120ns, CMOS, PDIP40, 0.600 INCH, DIP-40	MASK ROM, 256KX16, 100ns, CMOS, PDIP40, 0.600 INCH, DIP-40
Maker	SAMSUNG	SAMSUNG
Parts packaging code	DIP	DIP
package instruction	DIP,	DIP,
Contacts	40	40
Reach Compliance Code	compliant	unknown
ECCN code	EAR99	EAR99
Maximum access time	120 ns	100 ns
Other features	TTL COMPATIBLE I/O	TTL COMPATIBLE I/O
JESD-30 code	R-PDIP-T40	R-PDIP-T40
length	52.42 mm	52.42 mm
memory density	4194304 bit	4194304 bit
Memory IC Type	MASK ROM	MASK ROM
memory width	16	16
Number of functions	1	1
Number of terminals	40	40
word count	262144 words	262144 words
character code	256000	256000
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	70 °C	70 °C
organize	256KX16	256KX16
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	DIP	DIP
Package shape	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	IN-LINE
Parallel/Serial	PARALLEL	PARALLEL
Certification status	Not Qualified	Not Qualified
Maximum seat height	5.08 mm	5.08 mm
Maximum supply voltage (Vsup)	3.3 V	3.6 V
Minimum supply voltage (Vsup)	2.7 V	3 V
Nominal supply voltage (Vsup)	3 V	3.3 V
surface mount	NO	NO
technology	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL
Terminal form	THROUGH-HOLE	THROUGH-HOLE
Terminal pitch	2.54 mm	2.54 mm
Terminal location	DUAL	DUAL
width	15.24 mm	15.24 mm

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Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

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