MT58L512L18PF-10 datasheet, PDF

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MT58L512L18PF-10: DescriptionCache SRAM, 512KX18, 5ns, CMOS, PBGA165, 13 X 15 MM, FBGA-165; Categorystorage storage; File Size459KB，27 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/

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MT58L512L18PF-10 Overview

Cache SRAM, 512KX18, 5ns, CMOS, PBGA165, 13 X 15 MM, FBGA-165

MT58L512L18PF-10 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Micron Technology
Parts packaging code	BGA
package instruction	13 X 15 MM, FBGA-165
Contacts	165
Reach Compliance Code	not_compliant
ECCN code	3A991.B.2.A
Maximum access time	5 ns
Other features	PIPELINED ARCHITECTURE
I/O type	COMMON
JESD-30 code	R-PBGA-B165
JESD-609 code	e0
length	15 mm
memory density	9437184 bit
Memory IC Type	CACHE SRAM
memory width	18
Number of functions	1
Number of terminals	165
word count	524288 words
character code	512000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	512KX18
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TBGA
Encapsulate equivalent code	BGA165,11X15,40
Package shape	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE
Parallel/Serial	PARALLEL
power supply	3.3 V
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum standby current	0.01 A
Minimum standby current	3.14 V
Maximum slew rate	0.3 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3.135 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
width	13 mm

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8Mb: 512K x 18, 256K x 32/36

PIPELINED, SCD SYNCBURST SRAM

8Mb SYNCBURST

™

SRAM

FEATURES

• Fast clock and OE# access times

• Single +3.3V +0.3V/-0.165V power supply (V

)

• Separate +3.3V or +2.5V isolated output buffer

supply (V

• SNOOZE MODE for reduced-power standby

• Single-cycle deselect (Pentium

BSRAM-compatible)

• Common data inputs and data outputs

• Individual BYTE WRITE control and GLOBAL

WRITE

• Three chip enables for simple depth expansion

and address pipelining

• Clock-controlled and registered addresses, data

I/Os and control signals

• Internally self-timed WRITE cycle

• Burst control (interleaved or linear burst)

• Automatic power-down for portable applications

• 100-pin TQFP package

• 165-pin FBGA package

• Low capacitive bus loading

• x18, x32, and x36 versions available

MT58L512L18P, MT58L256L32P, MT58L256L36P;

MT58L512V18P, MT58L256V32P, MT58L256V36P

3.3V V

, 3.3V or 2.5V I/O, Pipelined, Single-Cycle

Deselect

100-Pin TQFP

165-Pin FBGA

OPTIONS

• Timing (Access/Cycle/MHz)

3.5ns/6ns/166 MHz

4.0ns/7.5ns/133 MHz

5ns/10ns/100 MHz

• Configurations

3.3V I/O

512K x 18

256K x 32

256K x 36

2.5V I/O

512K x 18

256K x 32

256K x 36

• Packages

100-pin TQFP (2-chip enable)

100-pin TQFP (3-chip enable)

165-pin, 13mm x 15mm FBGA

• Operating Temperature Range

Commercial (0°C to +70°C)

Industrial (-40°C to +85°C)**

Part Number Example:

MARKING

-6

-7.5

-10

MT58L512L18P

MT58L256L32P

MT58L256L36P

MT58L512V18P

MT58L256V32P

MT58L256V36P

None

NOTE:

1. JEDEC-standard MS-026 BHA (LQFP).

* A Part Marking Guide for the FBGA devices can be found on Micron’s

Web site—http://www.micron.com/support/index.html.

** Industrial temperature range offered in specific speed grades and

configurations. Contact factory for more information.

GENERAL DESCRIPTION

The Micron

SyncBurst

™

SRAM family employs

high-speed, low-power CMOS designs that are fabri-

cated using an advanced CMOS process.

Micron’s 8Mb SyncBurst SRAMs integrate a 512K x

18, 256K x 32, or 256K x 36 SRAM core with advanced

synchronous peripheral circuitry and a 2-bit burst

counter. All synchronous inputs pass through registers

controlled by a positive-edge-triggered single-clock in-

put (CLK). The synchronous inputs include all ad-

dresses, all data inputs, active LOW chip enable (CE#),

two additional chip enables for easy depth expansion

(CE2, CE2#), burst control inputs (ADSC#, ADSP#,

ADV#), byte write enables (BWx#) and global write

MT58L512L18PT-6

8Mb: 512K x 18, 256K x 32/36 Pipelined, SCD SyncBurst SRAM

MT58L512L18P_C.p65 – Rev. 2/02

Micron Technology, Inc., reserves the right to change products or specifications without notice.

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