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VG36644041BTS-8HP

Description
Synchronous DRAM, 16MX4, 6ns, CMOS, PDSO54, 0.400 INCH, PLASTIC, TSOP-54
Categorystorage    storage   
File Size2MB,73 Pages
ManufacturerVanguard International Semiconductor Corporation
Websitehttp://www.vis.com.tw/
Download Datasheet Parametric View All

VG36644041BTS-8HP Overview

Synchronous DRAM, 16MX4, 6ns, CMOS, PDSO54, 0.400 INCH, PLASTIC, TSOP-54

VG36644041BTS-8HP Parametric

Parameter NameAttribute value
MakerVanguard International Semiconductor Corporation
Parts packaging codeTSOP
package instructionTSOP2,
Contacts54
Reach Compliance Codeunknown
ECCN codeEAR99
access modeFOUR BANK PAGE BURST
Maximum access time6 ns
Other featuresAUTO/SELF REFRESH
JESD-30 codeR-PDSO-G54
length22.22 mm
memory density67108864 bit
Memory IC TypeSYNCHRONOUS DRAM
memory width4
Number of functions1
Number of ports1
Number of terminals54
word count16777216 words
character code16000000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize16MX4
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP2
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Certification statusNot Qualified
Maximum seat height1.2 mm
self refreshYES
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationDUAL
width10.16 mm
VIS
Description
VG36644041BT / VG36648041BT / VG36641641BT
CMOS Synchronous Dynamic RAM
The device is CMOS Synchronous Dynamic RAM organized as 4,194,304 words x 4 bits x 4 banks,
2,097,152 words x 8 bits x 4 banks and 1,048,576 words x 16 bits x 4 banks, respectively. It is fabricated with
an advanced submicron CMOS technology and designed to operate from a singly 3.3V only power supply. It
is packaged in JEDEC standard pinout and standard plastic TSOP package.
Features
• Single 3.3V (
±
0.3V ) power supply
• High speed clock cycle time : 6 / 7 / 8 only for x16 organization
7L / 8H only for x4 / x8 organization
PC100(8H), PC133(7L)
• Fully synchronous with all signals referenced to a positive clock edge
• Programmable CAS Iatency (2, 3)
• Programmable burst length (1, 2, 4, 8 & Full page)
• Programmable wrap sequence (Sequential/Interleave)
• Automatic precharge and controlled precharge
• Auto refresh and self refresh modes
• Quad Internal banks controlled by A12 & A13 (Bank Select)
• Each Bank can operate simultaneously and independently
• LVTTL compatible I/O interface
• Random column access in every cycle
• X4 / X8 / X16 organization
• Input/Output controlled by DQM(X4 / X8) ,LDQM and UDQM(X16)
• 4,096 refresh cycles/64ms
• Burst termination by burst stop and precharge command
• Burst read/single write option
Document :1G5-0152
Rev.3
Page 1
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