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PF48F4000P0ZTQEJ

Description
Flash, 16MX16, 100ns, PBGA88,
Categorystorage    storage   
File Size1MB,98 Pages
ManufacturerMicron Technology
Websitehttp://www.mdtic.com.tw/
Environmental Compliance  
Download Datasheet Parametric View All

PF48F4000P0ZTQEJ Overview

Flash, 16MX16, 100ns, PBGA88,

PF48F4000P0ZTQEJ Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerMicron Technology
Reach Compliance Codecompliant
Maximum access time100 ns
startup blockTOP
command user interfaceYES
Universal Flash InterfaceYES
Data pollingNO
JESD-30 codeR-PBGA-B88
JESD-609 codee1
memory density268435456 bit
Memory IC TypeFLASH
memory width16
Number of departments/size4,255
Number of terminals88
word count16777216 words
character code16000000
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize16MX16
Package body materialPLASTIC/EPOXY
encapsulated codeFBGA
Encapsulate equivalent codeBGA88,8X12,32
Package shapeRECTANGULAR
Package formGRID ARRAY, FINE PITCH
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
power supply1.8,1.8/3.3 V
Programming voltage1.8 V
Certification statusNot Qualified
Department size16K,64K
Maximum standby current0.00021 A
Maximum slew rate0.031 mA
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTIN SILVER COPPER
Terminal formBALL
Terminal pitch0.8 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperature30
switch bitNO
typeNOR TYPE
256Mb and 512Mb (256Mb/256Mb),
P30-65nm
Features
Micron Parallel NOR Flash Embedded
Memory (P30-65nm)
JS28F256P30B/TFx, RC28F256P30B/TFx, PC28F256P30B/TFx,
RD48F4400P0VBQEx, RC48F4400P0VB0Ex,
PC48F4400P0VB0Ex, PF48F4000P0ZB/TQEx
Features
• High performance
– 100ns initial access for Easy BGA
– 110ns initial access for TSOP
– 25ns 16-word asychronous page read mode
– 52 MHz (Easy BGA) with zero WAIT states and
17ns clock-to-data output synchronous burst
read mode
– 4-, 8-, 16-, and continuous word options for burst
mode
– Buffered enhanced factory programming (BEFP)
at 2 MB/s (TYP) using a 512-word buffer
– 1.8V buffered programming at 1.14 MB/s (TYP)
using a 512-word buffer
• Architecture
– MLC: highest density at lowest cost
– Asymmetrically blocked architecture
– Four 32KB parameter blocks: top or bottom con-
figuration
– 128KB main blocks
– Blank check to verify an erased block
• Voltage and power
– V
CC
(core) voltage: 1.7V to 2.0V
– V
CCQ
(I/O) voltage: 1.7V to 3.6V
– Standy current: 65µA (TYP) for 256Mb
– 52 MHz continuous synchronous read current:
21mA (TYP), 24mA (MAX)
• Security
– One-time programmable register: 64 OTP bits,
programmed with unique information from Mi-
cron; 2112 OTP bits available for customer pro-
gramming
– Absolute write protection: V
PP
= V
SS
– Power-transition erase/program lockout
– Individual zero-latency block locking
– Individual block lock-down
– Password access
• Software
– 25μs (TYP) program suspend
– 25μs (TYP) erase suspend
– Flash Data Integrator optimized
– Basic command set and extended function Inter-
face (EFI) command set compatible
– Common flash interface
• Density and Packaging
– 56-lead TSOP package (256Mb only)
– 64-ball Easy BGA package (256Mb, 512Mb)
– QUAD+ and SCSP packages (256Mb, 512Mb)
– 16-bit wide data bus
• Quality and reliabilty
– JESD47 compliant
– Operating temperature: –40°C to +85°C
– Minimum 100,000 ERASE cycles per block
– 65nm process technology
PDF: 09005aef84566799
p30_65nm_MLC_256Mb-512mb.pdf - Rev. D 9/15 EN
1
Products and specifications discussed herein are subject to change by Micron without notice.
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2013 Micron Technology, Inc. All rights reserved.
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