SUPER LOW NOISE HJ FET
NE33200
FEATURES
• VERY LOW NOISE FIGURE:
0.75 dB typical at 12 GHz
Optimum Noise Figure, NF
OPT
(dB)
4
3.5
NOISE FIGURE & ASSOCIATED
GAIN vs. FREQUENCY
V
DS
= 2 V, I
DS
= 10 mA
24
21
18
15
12
9
6
NF
0.5
0
1
10
30
3
0
• HIGH ASSOCIATED GAIN:
10.5 dB Typical at 12 GHz
• GATE LENGTH:
0.3
µm
• GATE WIDTH:
280
µm
3
2.5
2
1.5
1
DESCRIPTION
The NE33200 is a Hetero-Junction FET chip that utilizes the
junction between Si-doped AlGaAs and undoped InGaAs to
create a two-dimensional electron gas layer with very high
electron mobility. Its excellent low noise figure and high
associated gain make it suitable for commercial and industrial
applications.
NEC's stringent quality assurance and test procedures as-
sure the highest reliability and performance.
Frequency, f (GHz)
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C)
PART NUMBER
PACKAGE OUTLINE
SYMBOLS
NF
OPT
1
PARAMETERS AND CONDITIONS
Noise Figure, V
DS
= 2 V, I
D
= 10 mA,
f = 4 GHz
f = 12 GHz
Associated Gain, V
DS
= 2 V, I
D
= 10 mA,
f = 4 GHz
f = 12 GHz
Output Power at 1 dB Gain Compression Point, f = 12 GHz
V
DS
= 2 V, I
DS
= 10 mA
V
DS
= 2 V, I
DS
= 20 mA
Gain at P
1dB
, f = 12 GHz
V
DS
= 2 V, I
DS
= 10 mA
V
DS
= 2 V, I
DS
= 20 mA
Saturated Drain Current, V
DS
= 2 V, V
GS
= 0 V
Pinch-off Voltage, V
DS
= 2 V, I
D
= 100
µA
Transconductance, V
DS
= 2 V, I
D
= 10 mA
Gate to Source Leakage Current, V
GS
= -5 V
Thermal Resistance (Channel to Case)
UNITS
dB
dB
dB
dB
dBm
dBm
dB
dB
mA
V
mS
µA
°C/W
15
-2.0
45
MIN
NE33200
00 (Chip)
TYP
0.35
0.75
15.0
10.5
11.2
12.0
11.8
12.8
40
-0.8
70
0.5
10
240
80
-0.2
MAX
1.0
G
A
1
9.5
P
1dB
G
1dB
I
DSS
V
P
g
m
I
GSO
R
TH(CH-C)2
Notes:
1. RF performance is determined by packaging and testing 10 samples per wafer. Wafer rejection criteria for standard devices is 2 rejects for
10 samples.
2. Chip mounted on infinite heat sink.
California Eastern Laboratories
Associated Gain, G
A
(dB)
Ga
NE33200
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= 25°C)
SYMBOLS
V
DS
V
GS
I
DS
I
GRF
P
IN
T
CH
T
STG
P
T2
PARAMETERS
Drain to Source Voltage
Gate to Source Voltage
Drain Current
Gate Current
RF Input (CW)
Channel Temperature
Storage Temperature
Total Power Dissipation
UNITS
V
V
mA
µA
dBm
°C
°C
mW
RATINGS
4.0
-3.0
I
DSS
280
15
175
-65 to +175
240
TYPICAL NOISE PARAMETERS
1
(T
A
= 25°C)
V
DS
= 2 V, I
DS
= 10 mA
FREQ.
(GHz)
1
2
4
6
8
10
12
14
16
18
20
22
24
26
NF
OPT
(dB)
0.29
0.31
0.35
0.42
0.52
0.63
0.75
0.9
1.05
1.25
1.5
1.8
2.2
2.6
G
A
(dB)
21.3
18.3
15.3
13.5
12.2
11.3
10.5
9.9
9.3
8.8
8.3
7.9
7.6
7.3
0.82
0.81
0.76
0.71
0.64
0.55
0.48
0.41
0.37
0.35
0.37
0.38
0.39
0.40
Γ
OPT
MAG
ANG
8
17
41
63
77
95
112
130
144
164
180
-166
-154
-142
Rn/50
0.39
0.36
0.33
0.30
0.27
0.24
0.22
0.19
0.18
0.15
0.13
0.11
0.10
0.08
Note:
1. Operation in excess of any one of these parameters may result in
permanent damage.
2. With chip mounted on infinite heat sink.
TYPICAL PERFORMANCE CURVES
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
250
(T
A
= 25°C)
Note:
1. Noise Parameters include Bond Wires:
Gate: Total 2 wires, 1 per bond pad 0.0129" (327
µm)
long each wire.
Drain: Total 2 wires, 1 per bond pad 0.0118" (300
µm)
long each wire.
Source: Total 4 wires, 2 per side, 0.0071" (180
µm)
long each wire.
Wire: 0.0007" (17.8
µm)
dia. gold.
NOISE FIGURE and GAIN
vs. DRAIN CURRENT
V
DS
= 2 V, f = 12 GHz
2.0
16
Total Power Dissipation, (P
T
) mW
Noise Figure, NF (dB)
200
1.6
14
150
1.2
12
100
Mounted on
Infinite
Heat sink
0.8
G
A
0.4
N
F
10
50
Tuned at each I
DS
8
Tuned at 10 mA only
0
0
50
100 117
150
200
250
0
0
5
10
15
20
25
30
35
40
6
Ambient Temperature, T
A
(°C)
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
50
Drain Current, I
DS
(mA)
TRANSCONDUCTANCE vs. DRAIN CURRENT
V
DS
= 2.0 V
120
Drain Current, I
DS
(mA)
40
Transconductance, g
m
(mS)
V
GS
= 0 V
100
30
-0.1 V
80
60
20
-0.2 V
40
10
-0.3 V
-0.4 V
-0.5 V
20
0
0
0.5
1
1.5
2
0
Drain to Source Voltage,
2.5
V
DS
(V)
3
0
10
20
30
40
50
Drain Current, I
DS
(mA)
Associated Gain, G
A
(dB)
Recruitment
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