K4H561638J-LIB30 datasheet, PDF

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K4H561638J-LIB30: DescriptionDDR DRAM, 16MX16, 0.7ns, CMOS, PDSO66, 0.400 X 0.875 INCH, 0.65 MM PITCH, HALOGEN FREE AND ROHS COMPLIANT, TSOP2-66; Categorystorage storage; File Size416KB，24 Pages; ManufacturerSAMSUNG; Websitehttp://www.samsung.com/Products/Semiconductor/; Environmental Compliance

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K4H561638J-LIB30 Overview

DDR DRAM, 16MX16, 0.7ns, CMOS, PDSO66, 0.400 X 0.875 INCH, 0.65 MM PITCH, HALOGEN FREE AND ROHS COMPLIANT, TSOP2-66

K4H561638J-LIB30 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	SAMSUNG
Parts packaging code	TSOP2
package instruction	TSOP2, TSSOP66,.46
Contacts	66
Reach Compliance Code	unknown
ECCN code	EAR99
access mode	FOUR BANK PAGE BURST
Maximum access time	0.7 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	167 MHz
I/O type	COMMON
interleaved burst length	2,4,8
JESD-30 code	R-PDSO-G66
length	22.22 mm
memory density	268435456 bit
Memory IC Type	DDR DRAM
memory width	16
Number of functions	1
Number of ports	1
Number of terminals	66
word count	16777216 words
character code	16000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	16MX16
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP2
Encapsulate equivalent code	TSSOP66,.46
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	2.5 V
Certification status	Not Qualified
refresh cycle	8192
Maximum seat height	1.2 mm
self refresh	YES
Continuous burst length	2,4,8
Maximum standby current	0.004 A
Maximum slew rate	0.27 mA
Maximum supply voltage (Vsup)	2.7 V
Minimum supply voltage (Vsup)	2.3 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	10.16 mm

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K4H561638J

DDR SDRAM

256Mb J-die DDR SDRAM Specification

66 TSOP-II & 60 FBGA

with Lead-Free and Halogen-Free

(RoHS compliant)

Industrial Temp. -40 to 85°C

INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS,

AND IS SUBJECT TO CHANGE WITHOUT NOTICE.

NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,

EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,

TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL

INFORMATION IN THIS DOCUMENT IS PROVIDED

ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.

1. For updates or additional information about Samsung products, contact your nearest Samsung office.

2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar

applications where Product failure could result in loss of life or personal or physical harm, or any military or

defense application, or any governmental procurement to which special terms or provisions may apply.

* Samsung Electronics reserves the right to change products or specification without notice.

1 of 24

Rev. 1.11 March 2008

K4H561638J

Table of Contents

DDR SDRAM

1.0 Key Features .............................................................................................................................. 4

2.0 Ordering Information ................................................................................................................. 4

3.0 Operating Frequencies .............................................................................................................. 4

4.0 Pin Description .......................................................................................................................... 5

5.0 Package Physical Dimension ................................................................................................... 6

6.0 Block Diagram (4Mb x 16 I/O x4 Banks) ................................................................................... 7

7.0 Input/Output Function Description .......................................................................................... 8

8.0 Command Truth Table ............................................................................................................... 9

9.0 General Description ................................................................................................................. 10

10.0 Absolute Maximum Rating .................................................................................................... 10

11.0 DC Operating Conditions ...................................................................................................... 10

12.0 DDR SDRAM Spec Items & Test Conditions ....................................................................... 11

13.0 Input/Output Capacitance ..................................................................................................... 11

14.0 Detailed test condition for DDR SDRAM IDD1 & IDD7A ..................................................... 12

15.0 DDR SDRAM IDD spec table ................................................................................................. 13

16.0 AC Operating Conditions ...................................................................................................... 14

17.0 AC Overshoot/Undershoot specification for Address and Control Pins .......................... 14

18.0 Overshoot/Undershoot specification for Data, Strobe and Mask Pins ............................. 15

19.0 AC Timming Parameters & Specifications .......................................................................... 16

20.0 System Characteristics for DDR SDRAM ............................................................................. 17

21.0 Component Notes .................................................................................................................. 18

22.0 System Notes ......................................................................................................................... 20

23.0 IBIS : I/V Characteristics for Input and Output Buffers ...................................................... 21

2 of 24

Rev. 1.11 March 2008

K4H561638J-LIB30 Related Products

	K4H561638J-LIB30	K4H561638J-HIB30	K4H561638J-HPB30	K4H561638J-LPCC0	K4H561638J-LICC0	K4H561638J-LPB30	K4H561638J-HICC0	K4H561638J-HPCC0
Description	DDR DRAM, 16MX16, 0.7ns, CMOS, PDSO66, 0.400 X 0.875 INCH, 0.65 MM PITCH, HALOGEN FREE AND ROHS COMPLIANT, TSOP2-66	DDR DRAM, 16MX16, 0.7ns, CMOS, PBGA60, HALOGEN FREE AND ROHS COMPLIANT, FBGA-60	DDR DRAM, 16MX16, 0.7ns, CMOS, PBGA60, HALOGEN FREE AND ROHS COMPLIANT, FBGA-60	DDR DRAM, 16MX16, 0.65ns, CMOS, PDSO66, 0.400 X 0.875 INCH, 0.65 MM PITCH, HALOGEN FREE AND ROHS COMPLIANT, TSOP2-66	DDR DRAM, 16MX16, 0.65ns, CMOS, PDSO66, 0.400 X 0.875 INCH, 0.65 MM PITCH, HALOGEN FREE AND ROHS COMPLIANT, TSOP2-66	DDR DRAM, 16MX16, 0.7ns, CMOS, PDSO66, 0.400 X 0.875 INCH, 0.65 MM PITCH, HALOGEN FREE AND ROHS COMPLIANT, TSOP2-66	DDR DRAM, 16MX16, 0.65ns, CMOS, PBGA60, HALOGEN FREE AND ROHS COMPLIANT, FBGA-60	DDR DRAM, 16MX16, 0.65ns, CMOS, PBGA60, HALOGEN FREE AND ROHS COMPLIANT, FBGA-60
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to	conform to	conform to	conform to
Parts packaging code	TSOP2	BGA	BGA	TSOP2	TSOP2	TSOP2	BGA	BGA
package instruction	TSOP2, TSSOP66,.46	TFBGA, BGA60,9X12,40/32	TFBGA, BGA60,9X12,40/32	TSOP2, TSSOP66,.46	TSOP2, TSSOP66,.46	TSOP2, TSSOP66,.46	TFBGA, BGA60,9X12,40/32	TFBGA, BGA60,9X12,40/32
Contacts	66	60	60	66	66	66	60	60
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
access mode	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST
Maximum access time	0.7 ns	0.7 ns	0.7 ns	0.65 ns	0.65 ns	0.7 ns	0.65 ns	0.65 ns
Other features	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	167 MHz	167 MHz	167 MHz	200 MHz	200 MHz	167 MHz	200 MHz	200 MHz
I/O type	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON
interleaved burst length	2,4,8	2,4,8	2,4,8	2,4,8	2,4,8	2,4,8	2,4,8	2,4,8
JESD-30 code	R-PDSO-G66	R-PBGA-B60	R-PBGA-B60	R-PDSO-G66	R-PDSO-G66	R-PDSO-G66	R-PBGA-B60	R-PBGA-B60
length	22.22 mm	14 mm	14 mm	22.22 mm	22.22 mm	22.22 mm	14 mm	14 mm
memory density	268435456 bit	268435456 bit	268435456 bit	268435456 bit	268435456 bit	268435456 bit	268435456 bit	268435456 bit
Memory IC Type	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM
memory width	16	16	16	16	16	16	16	16
Number of functions	1	1	1	1	1	1	1	1
Number of ports	1	1	1	1	1	1	1	1
Number of terminals	66	60	60	66	66	66	60	60
word count	16777216 words	16777216 words	16777216 words	16777216 words	16777216 words	16777216 words	16777216 words	16777216 words
character code	16000000	16000000	16000000	16000000	16000000	16000000	16000000	16000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
organize	16MX16	16MX16	16MX16	16MX16	16MX16	16MX16	16MX16	16MX16
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSOP2	TFBGA	TFBGA	TSOP2	TSOP2	TSOP2	TFBGA	TFBGA
Encapsulate equivalent code	TSSOP66,.46	BGA60,9X12,40/32	BGA60,9X12,40/32	TSSOP66,.46	TSSOP66,.46	TSSOP66,.46	BGA60,9X12,40/32	BGA60,9X12,40/32
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	2.5 V	2.5 V	2.5 V	2.6 V	2.6 V	2.5 V	2.6 V	2.6 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
refresh cycle	8192	8192	8192	8192	8192	8192	8192	8192
Maximum seat height	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm
self refresh	YES	YES	YES	YES	YES	YES	YES	YES
Continuous burst length	2,4,8	2,4,8	2,4,8	2,4,8	2,4,8	2,4,8	2,4,8	2,4,8
Maximum standby current	0.004 A	0.004 A	0.004 A	0.004 A	0.004 A	0.004 A	0.004 A	0.004 A
Maximum slew rate	0.27 mA	0.27 mA	0.27 mA	0.29 mA	0.29 mA	0.27 mA	0.29 mA	0.29 mA
Maximum supply voltage (Vsup)	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V
Minimum supply voltage (Vsup)	2.3 V	2.3 V	2.3 V	2.5 V	2.5 V	2.3 V	2.5 V	2.5 V
Nominal supply voltage (Vsup)	2.5 V	2.5 V	2.5 V	2.6 V	2.6 V	2.5 V	2.6 V	2.6 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal form	GULL WING	BALL	BALL	GULL WING	GULL WING	GULL WING	BALL	BALL
Terminal pitch	0.65 mm	0.8 mm	0.8 mm	0.65 mm	0.65 mm	0.65 mm	0.8 mm	0.8 mm
Terminal location	DUAL	BOTTOM	BOTTOM	DUAL	DUAL	DUAL	BOTTOM	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	10.16 mm	8 mm	8 mm	10.16 mm	10.16 mm	10.16 mm	8 mm	8 mm
Maker	SAMSUNG	SAMSUNG	-	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG

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