ATAM893X-TKQJ datasheet, PDF - EEWORLD Datasheet

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ATAM893X-TKQJ: DescriptionMicrocontroller, 4-Bit, FLASH, 4MHz, CMOS, PDSO20, LEAD FREE, SSOP-20; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1MB，93 Pages; ManufacturerAtmel (Microchip); Environmental Compliance

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ATAM893X-TKQJ Overview

Microcontroller, 4-Bit, FLASH, 4MHz, CMOS, PDSO20, LEAD FREE, SSOP-20

ATAM893X-TKQJ Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Atmel (Microchip)
Parts packaging code	SSOP
package instruction	SSOP,
Contacts	20
Reach Compliance Code	compliant
Has ADC	NO
Address bus width
bit size	4
maximum clock frequency	4 MHz
DAC channel	NO
DMA channel	NO
External data bus width
JESD-30 code	R-PDSO-G20
JESD-609 code	e3
length	6.625 mm
Number of I/O lines	16
Number of terminals	20
On-chip program ROM width	8
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	SSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
RAM (bytes)	128
rom(word)	4096
ROM programmability	FLASH
speed	4 MHz
Maximum supply voltage	6.5 V
Minimum supply voltage	2.4 V
Nominal supply voltage	3 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	MATTE TIN
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	40
width	4.4 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER

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Features

•

Extended Temperature Range for Very High Temperature up to 125°C

4-Kbyte EEPROM Program Memory

EEPROM Programmable Options

Read Protection for the EEPROM Program Memory

16 Bi-directional I/Os

Up to Seven External/Internal Interrupt Sources

Eight Hardware and Software Interrupt Priorities

Multifunction Timer/Counter with Prescaler/Interval Timer

Programmable System-clock with Prescaler and Five Different Clock Sources

Wide Supply Voltage Range (1.8 V to 6.5 V)

Very Low Sleep Current (< 1 µA)

512-bit EEPROM Data Memory

256

4-bit RAM Data Memory

Synchronous Serial Interface (2-wire, 3-wire)

Watchdog, POR and Brown-out Function

Voltage Monitoring Inclusive Lo_BAT Detect

Multi-chip Link for U3280M

Description

The ATAM893-J is the Multiple Times Programmable (MTP) version for the MARC4

ROM types ATAR080, ATAR090/890 and ATAR092/892. The MTP is designed with

EEPROM cells so it can be programmed several times. To offer full compatibility with

each ROM version, the I/O configuration is stored into a separate internal EEPROM

block during programming. The configuration is downloaded to the I/Os with every

power-on reset.

Figure 1.

Block Diagram

OSC1

OSC2

Flash Version

for ATAR080,

ATAR090/890

and

ATAR092/892

ATAM893-J

Brown-out protect.

RESET

Voltage monitor

External input

VMI

BP10

Port 1

BP13

BP20/NTE

oscillators

Crystal

oscillators

External

clock input

UTCM

Timer 1

interval- and

watchdog timer

Timer 2

T2I

T2O

Clock management

EEPROM

4 K x 8 bit

RAM

256 x 4 bit

8/12-bit timer

with modulator

SSI

Serial interface

Timer 3

8-bit

timer/counter

with modulator

and demodulator

Data direction

MARC4

4-bit CPU core

I/O bus

Port 2

BP21

BP22

BP23

T3O

T3I

Data direction +

alternate function

Port 4

Data direction +

interrupt control

Port 5

Data direction +

alternate function

Port 6

EEPROM

2 x 32 x 16 bit

BP40

BP42

BP50

BP52

INT3

T2O

INT6

INT1

BP41

BP43

BP51

BP53

INT3

VMI

INT6

INT1

T2I

BP60

T3O

BP63

T3I

Rev. 4680B–4BMCU–05/04

ATAM893-J

Introduction

The ATAM893-J is a member of Atmel’s family of 4-bit single-chip microcontrollers.

Instead of ROM it contains EEPROM, RAM, parallel I/O ports, two 8-bit programmable

multifunction timer/counters, voltage supervisor, interval timer with watchdog function

and a sophisticated on-chip clock generation with integrated RC-, 32-kHz and 4-MHz

crystal oscillators.

Differences Between ATAM893-J and ATARx90/x92

Program Memory

The program memory of the MTP device is realized as an EEPROM. The memory size

for user programs is 4096 bytes. It is programmed as 258

16-byte blocks of data. The

implemented LOCK bit function is user selectable and protects the device from unautho-

rized read out of the program memory.

An additional area of 32 bytes of the EEPROM is used to store information about the

hardware configuration. All the options that are selectable for the ROM versions are

available to the user. This includes not only the different port options but also the possi-

bilities to select different capacitors for OSC1 and OSC2, the option to enable or disable

the hardlock for the watchdog, the option to select OSC2 instead of OSC1 as external

clock input and the option to enable the external clock monitor as a reset source. Acti-

vating the options is performed by the reset circuitry. Reset starts a download sequence

to transfer the information from the memory into a shift register (configuration register).

The ATAM893-J contains an internal data EEPROM that is organized as two pages of

16 bit. If it is necessary to be compatible with the ROM parts, only one page must

be used with the flash part. Also for compatibility reasons the access to the EEPROM is

handled via the MCL (serial interface) as in the corresponding ROM parts. A behavioral

difference that only needs to be considered for error handling can be seen, when the

communication via the MCL is not terminated correctly. A missing STOP condition leads

to a significantly higher current consumption for the ROM parts compared to the flash

parts. A slightly different concept for the read amplifiers of the memory makes the flash

part more tolerant in terms of communication errors.

During each reset (power-on or brown-out) the configuration register is reset and

reloaded with the data from the configuration memory. This leads to a slightly different

behavior compared to the ROM versions. Both devices switch their I/Os to input during

reset but the ROM part has the mask selected pull-up or pull-down resistors active while

the MTP has them removed until the download is finished.

The typical frequency of the internal RC-oscillator is about 5% higher for the Flash part

compared to the ROM part. But due to the wide range of ±50% overall tolerances this

should not affect the application too much.

This 5% is also valid for the RC-oscillator with an external resistor. For a frequency of

4 MHz the flash part requires a resistor of 180 k, while the ROM part only needs 170 k.

Configuration Memory

Data Memory

Reset Function

RC-oscillator Frequency

High Drive Outputs

On request the ROM parts offer a high current output selection. These pins than are

twice as strong as in the standard configuration. The ATAM893-J does not offer this

selection. Only the Timer 2 output (BP42) and the Timer 3 output (BP60) are configured

as high current outputs for the low side driver by default. This configuration is fixed and

cannot be changed by the customer.

4680B–4BMCU–05/04

ATAM893-J

Components of MARC4

Core

Program Memory

The core contains ROM, RAM, ALU, program counter, RAM address registers, instruc-

tion decoder and interrupt controller. The following sections describe each functional

block in more detail.

The program memory (EEPROM) is programmable with the customer application pro-

gram. The EEPROM is addressed by a 12-bit wide program counter, thus predefining a

maximum program bank size of 4 Kbytes. The lowest user program memory address

segment is taken up by a 512-byte zero page which contains predefined start addresses

for interrupt service routines and special subroutines accessible with single byte instruc-

tions (SCALL).

The corresponding memory map is shown in Figure 4. Look-up tables of constants can

0also be held in ROM and are accessed via the MARC4’s built-in table instruction.

Figure 4.

ROM Map

FFFh

1F8h

1F0h

1E8h

1E0h

1C 0h

180h

140h

INT7

INT6

INT5

INT4

INT3

INT2

INT1

INT0

(4 K x 8 bit)

7FFh

SCALL addresses

EEPROM

page

100h

0C 0h

080h

1FFh

Zero page

000h

020h

018h

010h

008h

000h

040h

008h

000h

$RESET

$AUTOSLEEP

RAM

The ATAM893-J contains 256

4-bit wide static random access memory (RAM). It is

used for the expression stack, the return stack and data memory for variables and

arrays. The RAM is addressed by any of the four 8-bit wide RAM address registers SP,

RP, X and Y.

The 4-bit wide expression stack is addressed with the expression Stack Pointer (SP). All

arithmetic, I/O and memory reference operations take their operands from, and return

their results to the expression stack. The MARC4 performs the operations with the top of

stack items (TOS and TOS-1). The TOS register contains the top element of the expres-

sion stack and works in the same way as an accumulator. This stack is also used for

passing parameters between subroutines and as a scratch pad area for temporary stor-

age of data.

The 12-bit wide return stack is addressed by the Return stack Pointer (RP). It is used for

storing return addresses of subroutines, interrupt routines and for keeping loop index

counts. The return stack can also be used as a temporary storage area.

The MARC4 instruction set supports the exchange of data between the top elements of

the expression stack and the return stack. The two stacks within the RAM have a user

definable location and maximum depth.

Expression Stack

Return Stack

4680B–4BMCU–05/04

ATAM893X-TKQJ Related Products

	ATAM893X-TKQJ	ATAM893X-TKHJ	ATAM893X-TKSJ
Description	Microcontroller, 4-Bit, FLASH, 4MHz, CMOS, PDSO20, LEAD FREE, SSOP-20	Microcontroller, 4-Bit, FLASH, 4MHz, CMOS, PDSO20, LEAD FREE, SSOP-20	Microcontroller, 4-Bit, FLASH, 4MHz, CMOS, PDSO20, LEAD FREE, SSOP-20
Is it lead-free?	Lead free	Lead free	Lead free
Is it Rohs certified?	conform to	conform to	conform to
Parts packaging code	SSOP	SSOP	SSOP
package instruction	SSOP,	SSOP,	SSOP,
Contacts	20	20	20
Reach Compliance Code	compliant	compliant	compliant
Has ADC	NO	NO	NO
bit size	4	4	4
maximum clock frequency	4 MHz	4 MHz	4 MHz
DAC channel	NO	NO	NO
DMA channel	NO	NO	NO
JESD-30 code	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20
JESD-609 code	e3	e3	e3
length	6.625 mm	6.625 mm	6.625 mm
Number of I/O lines	16	16	16
Number of terminals	20	20	20
On-chip program ROM width	8	8	8
Maximum operating temperature	125 °C	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C
PWM channel	YES	YES	YES
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SSOP	SSOP	SSOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260	260	260
Certification status	Not Qualified	Not Qualified	Not Qualified
RAM (bytes)	128	128	128
rom(word)	4096	4096	4096
ROM programmability	FLASH	FLASH	FLASH
speed	4 MHz	4 MHz	4 MHz
Maximum supply voltage	6.5 V	6.5 V	6.5 V
Minimum supply voltage	2.4 V	2.4 V	2.4 V
Nominal supply voltage	3 V	3 V	3 V
surface mount	YES	YES	YES
technology	CMOS	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
Terminal surface	MATTE TIN	MATTE TIN	MATTE TIN
Terminal form	GULL WING	GULL WING	GULL WING
Terminal pitch	0.65 mm	0.65 mm	0.65 mm
Terminal location	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	40	40	40
width	4.4 mm	4.4 mm	4.4 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER	MICROCONTROLLER	MICROCONTROLLER
Maker	Atmel (Microchip)	-	Atmel (Microchip)

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