If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
V
CC
Voltage
Reset Voltage
Output Current (Reset)
Operating Temperature Range
LP3470
−0.3V to +6V
−0.3V to +6V
10 mA
−20°C to +85°C
LP3470I
Junction Temperature (T
Jmax
)
Power Dissipation (T
A
= 25°C) (Note
2)
θ
JA
(Note
2)
Storage Temp. Range
Lead Temp. (Soldering, 5 sec)
ESD Rating (Note
3)
−40°C to +85°C
125°C
300 mW
280°C/W
−65°C to +150°C
260°C
2 kV
Electrical Characteristics
Limits in standard typeface are for T
J
= 25°C, and limits in
boldface
type apply over the full operating temperature range, unless
otherwise specified. V
CC
= +2.4V to +5.0V unless otherwise noted.
Symbol
V
CC
I
CC
V
RTH
Parameter
Operating Voltage Range
V
CC
Supply Current
Reset Threshold Voltage (Note
6)
V
CC
= 4.5V
LP3470
16
V
RTH
0.99
V
RTH
0.99
V
RTH
0.99
V
RTH
0.985
V
RTH
15
1.0
Conditions
Typ
Min
(Note
4)
(Note
5)
0.5
Max
(Note
5)
5.5
30
1.01
V
RTH
1.01
V
RTH
1.01
V
RTH
1.015
V
RTH
65
300
3.5
0.1
0.1
0.4
20
0.15
0.68
68
1
6
kΩ
µA
V
Units
V
µA
LP3470I
V
RTH
V
V
HYST
t
PD
t
RP
V
OL
Hysteresis Voltage (Note
7)
V
CC
to Reset Delay
Reset Timeout Period (Note
8)
Reset Output Voltage Low
V
CC
falling at 1 mV/µs
C
1
= 1 nF
V
CC
= 0.5V; I
OL
= 30 µA
V
CC
= 1.0V; I
OL
= 100 µA
V
CC
=V
RTH
−100 mV; I
OL
= 4 mA
35
100
2
mV
µs
ms
R
1
I
LEAK
External Pull-up Resistor
Reset Output Leakage Current
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device
beyond its operating conditions.
Note 2:
The maximum power dissipation must be derated at elevated temperatures and is dictated by T
Jmax
(Maximum Junction Temperature),
θ
JA
(Junction to
Ambient Thermal Resistance), and T
A
(Ambient Temperature). The maximum allowable power dissipation at any temperature is P
Dmax
= (T
Jmax
− T
A
)/ θ
JA
or the
number given in the Absolute Maximum Ratings, whichever is lower.
Note 3:
The Human Body Model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin.
Note 4:
Typical numbers are at 25°C and represent the most likely parametric norm.
Note 5:
Min. and Max. limits in standard typeface are 100% production tested at 25°C. Min. and Max. limits in boldface are guaranteed through correlation using
Statistical Quality Control (SQC) methods. The limits are used to calculate National's Average Outgoing Quality Level (AOQL).
Note 6:
Factory-trimmed reset thresholds are available in 50 mV increments from 2.4V to 5.0V. Contact your National Semiconductor representative.
Note 7:
V
HYST
affects the relation between V
CC
and Reset as shown in the timing diagram.
Note 8:
t
RP
is programmable by varying the value of the external capacitor (C
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Embedded System
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