M93C86, M93C76, M93C66
M93C56, M93C46, M93C06
16K/8K/4K/2K/1K/256 (x8/x16) Serial Microwire Bus EEPROM
INDUSTRY STANDARD MICROWIRE BUS
1 MILLION ERASE/WRITE CYCLES, with
40 YEARS DATA RETENTION
DUAL ORGANIZATION: by WORD (x16) or by
BYTE (x8)
BYTE/WORD and ENTIRE MEMORY
PROGRAMMING INSTRUCTIONS
SELF-TIMED PROGRAMMING CYCLE with
AUTO-ERASE
READY/BUSY SIGNAL DURING
PROGRAMMING
SINGLE SUPPLY VOLTAGE:
– 4.5V to 5.5V for M93Cx6 version
– 2.5V to 5.5V for M93Cx6-W version
– 1.8V to 3.6V for M93Cx6-R version
SEQUENTIAL READ OPERATION
5ms TYPICAL PROGRAMMING TIME
ENHANCED ESD/LATCH-UP
PERFORMANCES
DESCRIPTION
This M93C86/C76/C66/C56/C46/C06 specifica-
tion covers a range of 16K/8K/4K/2K/1K/256 bit
serial EEPROM products respectively. In this text,
products are referred to as M93Cx6. The M93Cx6
is an Electrically Erasable Programmable Memory
(EEPROM) fabricated with STMicroelectronics’s
High Endurance Single Polysilicon CMOS technol-
ogy. The M93Cx6 memory is accessed through a
serial input (D) and output (Q) using the MI-
CROWIRE bus protocol.
Table 1. Signal Names
S
D
Q
C
ORG
V
CC
V
SS
February 1999
Chip Select Input
Serial Data Input
Serial Data Output
Serial Clock
Organisation Select
Supply Voltage
Ground
8
1
PSDIP8 (BN)
0.25mm Frame
8
1
SO8 (MN)
150mil Width
8
1
TSSOP8 (DW)
169mil Width
Figure 1. Logic Diagram
VCC
D
C
M93Cx6
S
ORG
Q
VSS
AI01928
1/19
M93C86, M93C76, M93C66, M93C56, M93C46, M93C06
Figure 2A. DIP and SO Pin Connections
Figure 2B. SO 90° Turn Pin Connections
M93Cx6
S
C
D
Q
1
2
3
4
8
7
6
5
AI01929B
M93Cx6
VCC
DU
ORG
VSS
DU
VCC
S
C
1
2
3
4
8
7
6
5
AI00900
ORG
VSS
Q
D
Warning:
DU = Don’t Use
Warning:
DU = Don’t Use
Figure 2C. TSSOP Pin Connections
M93C06/46/56/66 - W
M93C06/46/56/66 - R
S
C
D
Q
1
2
3
4
8
7
6
5
AI02789
VCC
DU
ORG
VSS
Warning:
DU = Don’t Use
DESCRIPTION
(cont’d)
The M93Cx6 specified at 5V±10%, the M93Cx6-W
specified at 2.5V to 5.5V and the M93Cx6-R speci-
fied at 1.8V to 3.6V.
The M93Cx6 memory array organization may be
divided into either bytes (x8) or words (x16) which
may be selected by a signal applied on the ORG
input. The M93C86/C76/C66/C56/C46/C06 is di-
vided into either 2048/1024/512/256/128/32 x8 bit
bytes or 1024/512/256/128/64/16 x16 bit words
respectively. These memory devices are available
in both PSDIP8, SO8 and TSSOP8 packages.
The M93Cx6 memory is accessed by a set of
instructions which includes Read a Byte/Word,
Write a Byte/Word, Erase a Byte/Word, Erase All
and Write All. A Read instruction loads the address
of the first byte/word to be read into an internal
address pointer. The data contained at this address
is then clocked out serially. The address pointer is
automatically incremented after the data is output
and, if the Chip Select input (S) is held High, the
M93Cx6 can output a sequential stream of data
bytes/words. In this way, the memory can be read
2/19
as a data stream from 8 up to 16,384 bits long (for
the M93C86 only), or continuously as the address
counter automatically rolls over to ’00’ when the
highest address is reached.
Programming is internally self-timed (the external
clock signal on C input may be disconnected or left
running after the start of a Write cycle) and does
not require an erase cycle prior to the Write instruc-
tion. The Write instruction writes 8 or 16 bits at one
time into one of the byte or word locations of the
M93Cx6. After the start of the programming cycle,
a Busy/Ready signal is available on the Data output
(Q) when Chip Select (S) is driven High.
An internal feature of the M93Cx6 provides Power-
on Data Protection by inhibiting any operation
when the Supply is too low for reliable operation.
The design of the M93Cx6 and the High Endurance
CMOS technology used for its fabrication give an
Erase/Write cycle Endurance of 1,000,000 cycles
and a data retention of 40 years.
The DU (Don’t Use) pin does not affect the function
of the memory. It is reserved for use by STMi-
croelectronics during test sequences. The pin may
be left unconnected or may be connected to V
CC
or V
SS
. Direct connection of DU to V
SS
is recom-
mended for the lowest standby power consump-
tion.
MEMORY ORGANIZATION
The M93Cx6 is organised in either bytes (x8) or
words (x16). If the ORG input is left unconnected
(or connected to V
CC
) the x16 organization is se-
lected; when ORG is connected to Ground (V
SS
)
the x8 organization is selected. When the M93Cx6
is in standby mode, the ORG input should be set
to either V
SS
or V
CC
in order to achieve minimum
power consumption. Any voltage between V
SS
and
V
CC
applied to the ORG input pin may increase the
standby current value.
M93C86, M93C76, M93C66, M93C56, M93C46, M93C06
Table 2. Absolute Maximum Ratings
(1)
Symbol
T
A
T
STG
T
LEAD
V
IO
V
CC
V
ESD
Parameter
Ambient Operating Temperature
Storage Temperature
Lead Temperature, Soldering
(SO8 package)
(PSDIP8 package)
40 sec
10 sec
Value
–40 to 125
–65 to 150
215
260
–0.3 to V
CC
+0.5
–0.3 to 6.5
4000
500
Unit
°C
°C
°C
V
V
V
V
Input or Output Voltages (Q = V
OH
or Hi-Z)
Supply Voltage
Electrostatic Discharge Voltage (Human Body model)
(2)
Electrostatic Discharge Voltage (Machine model)
(3)
Notes:
1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings"
may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum
Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other
relevant quality documents.
2. MIL-STD-883C, 3015.7 (100pF, 1500
Ω).
3. EIAJ IC-121 (Condition C) (200pF, 0
Ω).
Table 3. AC Measurement Conditions
Input Rise and Fall Times
Input Pulse Voltages (M93Cxx)
Input Pulse Voltages (M93Cxx-W, M93Cxx-R)
Input Timing Reference Voltages (M93Cxx)
Output Timing Reference Voltages (M93Cxx)
Input and Output Timing Reference Voltages (M93Cxx-W, M93Cxx-R)
Output Load
Note that Output Hi-Z is defined as the point where data is no longer driven.
≤
50ns
0.4V to 2.4V
0.2V
CC
to 0.8V
CC
1.0V to 2.0V
0.8V to 2.0V
0.3V
CC
to 0.7V
CC
C
L
= 100pF
POWER-ON DATA PROTECTION
In order to prevent data corruption and inadvertent
write operations during power-up, a Power On
Reset (POR) circuit resets all internal programming
circuitry and sets the device in the Write Disable
mode.
– At Power-up and Power-down, the device must
NOT be selected (that is, the S input must be
driven low) until the supply voltage reaches the
operating value V
CC
specified in the AC and DC
tables.
– When V
CC
reaches its functional value, the de-
vice is properly reset (in the Write Disable mode)
and is ready to decode and execute an incoming
instruction.
For the M93Cx6 specified at 5V, the POR threshold
voltage is around 3V. For all the other M93Cx6
specified at low V
CC
(with -W and -R V
CC
range
options), the POR threshold voltage is around 1.5V.
Figure 3. AC Testing Input Output Waveforms
M93CXX
2.4V
2V
1V
0.4V
INPUT
OUTPUT
2.0V
0.8V
M93CXX-W & M93CXX-R
0.8VCC
0.7VCC
0.3VCC
AI02553
0.2VCC
3/19
M93C86, M93C76, M93C66, M93C56, M93C46, M93C06
Table 4. Capacitance
(1)
(T
A
= 25
°C,
f = 1 MHz )
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Output Capacitance
Test Condition
V
IN
= 0V
V
OUT
= 0V
Min
Max
5
5
Unit
pF
pF
Note:
1. Sampled only, not 100% tested.
Table 5A. DC Characteristics for M93CXX
(T
A
= 0 to 70°C or –40 to 85°C; V
CC
= 4.5V to 5.5V)
Symbol
I
LI
I
LO
I
CC
I
CC1
V
IL
V
IH
V
OL
V
OH
Parameter
Input Leakage Current
Output Leakage Current
Supply Current
Supply Current (Standby)
Input Low Voltage (D, C, S)
Input High Voltage (D, C, S)
Output Low Voltage (Q)
Output High Voltage (Q)
Test Condition
0V
≤
V
IN
≤
V
CC
0V
≤
V
OUT
≤
V
CC
, Q in Hi-Z
V
CC
= 5V, S = V
IH
, f = 1 MHz
V
CC
= 5V, S = V
SS
, C = V
SS
,
ORG = V
SS
or V
CC
V
CC
= 5V
±
10%
V
CC
= 5V
±
10%
V
CC
= 5V, I
OL
= 2.1mA
V
CC
= 5V, I
OH
= –400µA
2.4
–0.3
2
Min
Max
±2.5
±2.5
1.5
50
0.8
V
CC
+ 1
0.4
Unit
µA
µA
mA
µA
V
V
V
V
Table 5B. DC Characteristics for M93CXX
(T
A
= –40 to 125°C; V
CC
= 4.5V to 5.5V)
Symbol
I
LI
I
LO
I
CC
I
CC1
V
IL
V
IH
V
OL
V
OH
Parameter
Input Leakage Current
Output Leakage Current
Supply Current
Supply Current (Standby)
Input Low Voltage (D, C, S)
Input High Voltage (D, C, S)
Output Low Voltage (Q)
Output High Voltage (Q)
Test Condition
0V
≤
V
IN
≤
V
CC
0V
≤
V
OUT
≤
V
CC
, Q in Hi-Z
V
CC
= 5V, S = V
IH
, f = 1 MHz
V
CC
= 5V, S = V
SS
, C = V
SS
,
ORG = V
SS
or V
CC
V
CC
= 5V
±
10%
V
CC
= 5V
±
10%
V
CC
= 5V, I
OL
= 2.1mA
V
CC
= 5V, I
OH
= –400µA
2.4
–0.3
2
Min
Max
±2.5
±2.5
1.5
50
0.8
V
CC
+ 1
0.4
Unit
µA
µA
mA
µA
V
V
V
V
4/19
M93C86, M93C76, M93C66, M93C56, M93C46, M93C06
Table 5C. DC Characteristics for M93CXX-W
(T
A
= 0 to 70°C or –40 to 85°C; V
CC
= 2.5V to 5.5V)
Symbol
I
LI
I
LO
I
CC
Parameter
Input Leakage Current
Output Leakage Current
Supply Current (CMOS Inputs)
Test Condition
0V
≤
V
IN
≤
V
CC
0V
≤
V
OUT
≤
V
CC
, Q in Hi-Z
V
CC
= 5V, S = V
IH
, f = 1 MHz
V
CC
= 2.5V, S = V
IH
, f = 1 MHz
I
CC1
V
IL
V
IH
V
OL
Supply Current (Standby)
Input Low Voltage (D, C, S)
Input High Voltage (D, C, S)
Output Low Voltage (Q)
V
CC
= 5V, I
OL
= 2.1mA
V
CC
= 2.5V, I
OL
= 100µA
V
OH
Output High Voltage (Q)
V
CC
= 5V, I
OH
= –400µA
V
CC
= 2.5V, I
OH
= –100µA
2.4
V
CC
– 0.2
V
CC
= 2.5V, S = V
SS
, C = V
SS
,
ORG = V
SS
or V
CC
–0.3
0.7 V
CC
Min
Max
±2.5
±2.5
1.5
1
10
0.2 V
CC
V
CC
+ 1
0.4
0.2
Unit
µA
µA
mA
mA
µA
V
V
V
V
V
V
Table 5D. DC Characteristics for M93CXX-R
(1)
(T
A
= 0 to 70°C or –20 to 85°C; V
CC
= 1.8V to 3.6V)
Symbol
I
LI
I
LO
I
CC
Parameter
Input Leakage Current
Output Leakage Current
Supply Current (CMOS Inputs)
Test Condition
0V
≤
V
IN
≤
V
CC
0V
≤
V
OUT
≤
V
CC
, Q in Hi-Z
V
CC
= 3.6V, S = V
IH
, f = 1 MHz
V
CC
= 1.8V, S = V
IH
, f = 1 MHz
I
CC1
V
IL
V
IH
V
OL
V
OH
Supply Current (Standby)
Input Low Voltage (D, C, S)
Input High Voltage (D, C, S)
Output Low Voltage (Q)
Output High Voltage (Q)
V
CC
= 1.8V, I
OL
= 100µA
V
CC
= 1.8V, I
OH
= –100µA
V
CC
– 0.2
V
CC
= 1.8V, S = V
SS
, C = V
SS
,
ORG = V
SS
or V
CC
–0.3
0.8 V
CC
Min
Max
±2.5
±2.5
1.5
1
5
0.2 V
CC
V
CC
+ 1
0.2
Unit
µA
µA
mA
mA
µA
V
V
V
V
Note:
1. This is preliminary data.
5/19
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