K8S3215ET(B)E
NOR FLASH MEMORY
32Mb E-die NOR Specification
INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS,
AND IS SUBJECT TO CHANGE WITHOUT NOTICE.
NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,
EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,
TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL
INFORMATION IN THIS DOCUMENT IS PROVIDED
ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.
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2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar
applications where Product failure couldresult in loss of life or personal or physical harm, or any military or
defense application, or any governmental procurement to which special terms or provisions may apply.
* Samsung Electronics reserves the right to change products or specification without notice.
1
Revision 1.1
September, 2006
K8S3215ET(B)E
FEATURES
•
Single Voltage, 1.7V to 1.95V for Read and Write operations
•
Organization
- 2,097,152 x 16 bit ( Word Mode Only)
•
Multiplexed Data and Address for reduction of interconnections
- A/DQ0 ~ A/DQ15
•
Read While Program/Erase Operation
•
Multiple Bank Architecture
- 16 Banks (2Mb Partition)
•
OTP Block : Extra 256Byte block
•
Read Access Time (@ C
L
=30pF)
- Asynchronous Random Access Time :
90ns (54MHz) / 80ns (66MHz)
- Synchronous Random Access Time :
88.5ns (54MHz) / 70ns (66MHz)
- Burst Access Time :
14.5ns (54MHz) / 11ns (66MHz)
•
Burst Length :
- Continuous Linear Burst
- Linear Burst : 8-word & 16-word with No-wrap & Wrap
•
Block Architecture
- Eight 4Kword blocks and sixty three 32Kword blocks
- Bank 0 contains eight 4 Kword blocks and three 32Kword
blocks
- Bank 1 ~ Bank 15 contain sixty 32Kword blocks
•
Reduce program time using the V
PP
•
Support Single & Quad word accelerate program
•
Power Consumption (Typical value, C
L
=30pF)
- Burst Access Current : 30mA
- Program/Erase Current : 15mA
- Read While Program/Erase Current : 40mA
- Standby Mode/Auto Sleep Mode : 15uA
•
Block Protection/Unprotection
- Using the software command sequence
- Last two boot blocks are protected by WP=V
IL
- All blocks are protected by V
PP
=V
IL
•
Handshaking Feature
- Provides host system with minimum latency by monitoring
RDY
•
Erase Suspend/Resume
•
Program Suspend/Resume
•
Unlock Bypass Program/Erase
•
Hardware Reset (RESET)
•
Data Polling and Toggle Bits
- Provides a software method of detecting the status of program
or erase completion
•
Endurance
100K Program/Erase Cycles Minimum
•
Data Retention : 10 years
•
Extended Temperature : -25°C ~ 85°C
•
Support Common Flash Memory Interface
•
Low Vcc Write Inhibit
•
Package : 44 - ball FBGA Type, 7.5x5mm
0.5 mm ball pitch
1.0 mm (Max.) Thickness
NOR FLASH MEMORY
32M Bit (2M x16) Muxed Burst , Multi Bank NOR Flash Memory
GENERAL DESCRIPTION
The K8S3215E featuring single 1.8V power supply is a 32Mbit
Muxed Burst Multi Bank Flash Memory organized as 2Mbx16.
The memory architecture of the device is designed to divide its
memory arrays into 71 blocks with independent hardware pro-
tection. This block architecture provides highly flexible erase
and program capability. The K8S3215E NOR Flash consists of
sixteen banks. This device is capable of reading data from one
bank while programming or erasing in the other bank.
Regarding read access time, the K8S3215E provides an 14.5ns
burst access time and an 90ns initial access time at 54MHz. At
66MHz, the K8S3215E provides an 11ns burst access time and
70ns initial access time. The device performs a program opera-
tion in units of Single 16 bits (word) and an erase operation in
units of a block. Single or multiple blocks can be erased. The
block erase operation is completed within typically 0.7 sec. The
device requires 15mA as program/erase current in the
extended temperature ranges.
The K8S3215E NOR Flash Memory is created by using Sam-
sung's advanced CMOS process technology. This device is
available in 44 ball FBGA package.
PIN DESCRIPTION
Pin Name
A16 - A20
Pin Function
Address Inputs
A/DQ0 - A/DQ15 Multiplexed Address/Data input/output
CE
OE
RESET
V
PP
WE
WP
CLK
RDY
AVD
Vcc
V
SS
Chip Enable
Output Enable
Hardware Reset Pin
Accelerates Programming
Write Enable
Hardware Write Protection Input
Clock
Ready Output
Address Valid Input
Power Supply
Ground
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to change products and specifications without notice.
3
Revision 1.1
September, 2006
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