U4083B
Low-Power Audio Amplifier for Telephone Applications
Description
The integrated circuit, U4083B, is a low power audio
amplifier for a telephone loudspeaker. It has differential
speaker outputs to maximize the output swing at low
supply voltages. There is no need for coupler capacitors.
The U4083B has an open loop gain of 80 dB whereas the
closed loop gain is adjusted with two external resistors. A
chip disable pin permits powering down and/or muting
the input signal.
Features
D
Wide operating voltage range: 2 to 16 V
D
Battery powered application due to low quiescent
supply current: 2.7 mA typical
D
Output Power, P
o
= 250 mW @ R
L
= 32
W
(speaker)
D
Low harmonic distortion (0.5% typical)
D
Wide range gain adjustable: 0 dB to 46 dB
D
Chip disable input to power down the integrated
circuit
Benefits
D
Low number of external components
D
Low current consumption
D
Low power down quiescent current
D
Drives a wide range of speaker loads
Block Diagram / Application Circuit
0.1
m
F
Input
Ci
1
m
F
75 k
W
Ri
3 k
W
Rf
4
Vi
FC1 3
C1
5
m
F
50 k
W
2
125 k
W
50 k
W
–
+
Amp.1
5
4 k
W
VO1
4 k
W
–
+
Amp.2
Bias
circuit
7 GND
Figure 1.
V
S
6
8
VO2
1
CD
C2 FC2
93 7781 e
Order Information
Extended Type Number
U4083B-AFP
U4083B-AFPG3
Package
SO8
SO8
Remarks
Taped and reeled
TELEFUNKEN Semiconductors
Rev. A2, 07-Apr-97
1 (11)
Preliminary Information
U4083B
Pin Description
CD
1
8
VO2
GND
VS
VO1
94 8022
FC2
FC1
Vi
2
7
3
6
4
Figure 2. Pinning
5
Pin
1
2
3
4
5
6
7
8
Symbol
CD
FC2
FC1
V
i
VO1
V
S
GND
VO2
Function
Chip disable
Filtering, power supply rejection
Filtering, power supply rejection
Amplifier input
Amplifier output 1
Voltage supply
Ground
Amplifier output 2
Functional Description
Including External Circuitry
Pin 1: Chip disable
*
digital input (CD)
Pin 1 (chip disable) is used to power down the IC to con-
serve power or muting or both.
Input impedance at pin 1 is typically 90 k
W
.
Logic 0 < 0.8 V
IC enabled (normal operation)
Logic 1 > 2 V
IC disabled
(see electrical characteristic equivalent resistance, R).
Apart from filtering, capacitors C
1
and C
2
also influence
the turn-on time of the circuit at power-up since capaci-
tors are charged up through the internal resistors (50 k
W
and 125 k
W
) as shown in the block diagram.
Figure 1 shows turn-on time versus C
2
at V
S
= 6 V, for two
different C
1
values.
Turn-on time is 60% longer when V
S
= 3 V and 20%
shorter when V
S
= 9 V.
Turn-off time is less than 10
m
s
Pin 4: Amplifier input
V
i
Pin 5: Amplifier output 1 V
O1
Pin 8: Amplifier output 2 V
O2
There are two identical operational amplifiers. Amp.1 has
an open loop gain 80 dB at 100 Hz (figure 2), whereas
the closed loop gain is set by external resistors, Rf and Ri
(figure 3). The amplifier is unity gain stable, and has a
unity gain frequency of approximately 1.5 MHz. A closed
loop gain of 46 dB is recommended for a frequency range
of 300 to 3400 Hz (voice band). Amp.2 is internally set
to a gain of –1.0 (0 dB). The outputs of both amplifiers are
capable of sourcing and sinking a peak current of 200 mA.
Output voltage swing is between 0.4 V and V
s
– 1.3 V at
maximum current (figures 18 and 19).
The output dc offset voltage between Pins 5 and 8 (V
O1
– V
O2
) is mainly a function of the feedback resistor, R
f
,
because the input offset voltage of the two amplifiers
generally neutralize each other.
Bias current of Amp. 1 which is constant with respect to
V
s
, however flows out of Pin 4 (V
i
) and through R
f
,
forcing V
01
to shift negative by an amount equal to R
f
I
IB
and V
O2
positive to an equal amount.
The output offset voltage specified in the electrical char-
acteristics is measured with the feedback resistor
(R
f
= 75 k
W
) shown in typical application circuit. It takes
into account bias current as well as internal offset voltages
of the amplifiers.
TELEFUNKEN Semiconductors
Rev. A2, 07-Apr-97
Figure 15 shows power supply current diagram. The
change in differential gain from normal operation to
muted operation (muting) is more than 70 dB.
Switching characteristics are as follows:
turn-on time
t
on
= 12 to 15 ms
turn-off time
t
off
2
m
s
v
They are independent of C
1
, C
2
and V
S
.
Voltages at Pins 2 and 3 are supplied from V
S
and there-
fore do not change when the U4083B is disabled.
Outputs– V
O1
(Pin 5) and V
O2
(Pin 8) –turn to a high im-
pedance condition by removing the signal from the
speaker.
When signals are applied from an external source to the
outputs (disabled), they must not exceed the range be-
tween the supply voltage, V
s
, and Ground.
Pins 2 and 3: Filtering, power supply rejection
Power supply rejection is provided by capacitors C
1
and
C
2
at Pin 3 and Pin 2, respectively. C
1
is dominant at high
frequencies whereas C
2
is dominant at low frequencies
(figures 4 to 7). Values of C
1
and C
2
depend on the
conditions of each application. For example, a line
powered speakerphone (telephone amplifier) will require
more filtering than a system powered by regulated power
supply.
The amount of rejection is a function of the capacitors and
the equivalent impedance looking into Pin 3 and Pin 2
2 (11)
w
Preliminary Information
U4083B
Pin 6: Supply and power dissipation
Power dissipation is shown in figures 8 to 10 for different
loads. Distortion characteristics are given in figures 11 to
13.
P
totmax
Operating range of the integrated circuit is defined with
a peak operating load current of 200 mA (figures 8 to
13). It is further specified with respect to different loads
in figure 14. The left (ascending) portion of each of the
three curves is defined by the power level at which 10%
distortion occurs. The center flat portion of each curve is
defined by the maximum output current capability of the
integrated circuit. The right (descending) portion of each
curve is defined by the maximum internal power dissipa-
tion of the IC at 25°C. At higher ambient temperatures,
the maximum load power must be reduced according to
the above mentioned equation.
"
+
T
jmax
– T
amb
R
thJA
where
T
jmax
= Junction temperature = 140°C
T
amb
= Ambient temperature
R
thJA
= Thermal resistance, junction-ambient
Power dissipated within the IC in a given application is
found from the following equation:
P
tot
= (V
S
Layout Considerations
Normally a snubber is not needed at the output of the IC,
unlike many other audio amplifiers. However, the PC
board layout, stray capacitances, and the manner in which
the speaker wires are configured, may dictate otherwise.
Generally the speaker wires should be twisted tightly, and
be not more than a few cm (or inches) in length.
@
I ) + (I
@
V
S
RMS
S
)
– (R
L
@
I
2
RMS
)
I
S
is obtained from figures 15
I
RMS
is the RMS current at the load R
L.
Absolute Maximum Ratings
Reference point Pin 7, T
amb
= 25°C unless otherwise specified.
Parameters
Supply voltage
Voltages
Disabled
Output current
Junction temperature
Storage temperature range
Ambient temperature range
Power dissipation: T
amb
= 60°C
Pin 6
Pins 1, 2, 3 and 4
Pins 5 and 8
Pins 5 and 8
Symbol
V
S
Value
–1.0 to +18
–1.0 to (VS +1.0)
–1.0 to (VS +1.0)
250
+140
–55 to +150
–20 to +70
440
Unit
V
V
V
mA
°C
°C
°C
mW
"
SO8
T
j
T
stg
T
amb
P
tot
Thermal Resistance
Parameters
Junction ambient
SO8
Symbol
R
thJA
Value
180
Unit
K/W
Operation Recommendation
Parameters
Supply voltage
Pin 6
Load impedance
Pins 5 to 8
Load current
Differential gain (5.0 kHz bandwidth)
Voltage @ CD Pin 1
Ambient temperature range
Symbol
V
S
R
L
I
L
D
G
V
CD
T
amb
Value
2 to 16
8.0 to 100
200
0 to 46
VS
–20 to +70
Unit
V
"
W
mA
dB
V
°C
TELEFUNKEN Semiconductors
Rev. A2, 07-Apr-97
3 (11)
Preliminary Information
U4083B
Electrical Characteristics
T
amb
= +25°C, reference point Pin 7, unless otherwise specified
Parameters
Test Conditions / Pins
Amplifiers (AC Characteristics)
Open gain loop
(Amp. 1, f < 100 Hz)
Closed gain loop (Amp. 2)
V
S
= 6.0 V, f = 1.0 kHz, R
L
= 32
W
V
S
= 3.0 V, R
L
= 16
W
, d < 10%
V
S
= 6.0 V, R
L
= 32
W
, d < 10%
V
S
= 12 V, R
L
= 100
W
, d < 10%
Total harmonic distortion
V
S
= 6.0 V, R
L
= 32
W
,
(f = 1.0 kHz)
P
o
= 125 mW
V
S
> 3.0 V, R
L
= 8
W
,
P
o
= 20 mW
V
S
> 12 V, R
L
= 32
W
,
P
o
= 200 mW
Power supply rejection ra-
V
S
= 6.0 V,
D
V
S
= 3.0 V
tio
C
1
= , C
2
= 0.01
m
F
C
1
= 0.1
m
F, C
2
= 0, f = 1.0 kHz
C
1
= 1.0
m
F, C
2
= 5.0
m
F,
f = 1.0 kHz
Muting
V
S
= 6.0 V, 1.0 kHz < f < 20 kHz,
CD = 2.0 V
Amplifiers (DC Characteristics)
Output dc level at V
O1
,
V
S
= 3.0 V, R
L
= 16
W
V
O2
V
S
= 6.0 V
R
f
= 75 kW
V
S
= 12 V
Output high level
I
O
= – 75 mA,
2.0 V < V
S
< 16 V
Output low level
I
O
= 75 mA,
2.0 V < V
S
< 16 V
Output dc offset voltage
V
S
= 6.0 V, R
f
= 75 k
W
,
(V
O1
– V
O2
)
R
L
= 32
W
Input bias current at V
i
V
S
= 6.0 V
Equivalent resistance at
V
S
= 6.0 V
Pin 3
Equivalent resistance at
V
S
= 6.0 V
Pin 2
Chip disable Pin 1
Input voltage low
Input voltage high
V
S
= V
CD
= 16 V
Input resistance
Gain bandwidth product
Output power
Symbol
Min.
Typ.
Max.
Unit
G
VOL1
G
V2
G
BW
Po
Po
Po
d
d
d
PSRR
PSRR
PSRR
G
MUTE
V
O
V
O
V
O
V
OH
V
OL
80
–0.35
55
250
400
0.5
0.5
0.6
50
12
52
>70
1.0
1.15
2.65
5.65
V
S
–1
0.16
1.25
1.0
0
1.5
+0.35
dB
dB
MHz
mW
%
T
dB
dB
V
V
V
D
V
O
–I
IB
R
R
–30
100
18
0
100
150
25
+30
200
220
40
mV
nA
k
W
k
W
*
*
Power supply current
V
S
= 3.0 V, R
L
= , CD = 0.8 V
V
S
= 16 V, R
L
= , CD = 0.8 V
V
S
= 3.0 V, R
L
= , CD = 2.0 V
T
T
T
V
IL
V
IH
R
CD
I
S
I
S
I
S
0.8
2.0
50
90
175
4.0
5.0
100
V
V
kW
mA
mA
m
A
65
4 (11)
Preliminary Information
TELEFUNKEN Semiconductors
Rev. A2, 07-Apr-97
U4083B
Typical Temperature Performance
T
amb
= –20 to +70°C
Function
Input bias current at V
i
Total harmonic distortion
V
S
= 6.0 V, R
L
= 32
W
, P
o
= 125 mW,
f = 1.0 kHz
Power supply current
V
S
= 3.0 V, R
L
= , CD = 0 V
V
S
= 3.0 V, R
L
= , CD = 2.0 V
360
300
240
t
on
( ms )
24
180
16
120
60
V
S
switching from 0 to + 6 V
0
0
94 7838 e
Typical Change
"
40
Units
pA/
°C
%/
°C
+ 0.003
T
T
– 2.5
– 0.03
m
A/
°C
m
A/
°C
40
R
f
= 150 k
W
R
i
= 6 k
W
R
f
= 75 k
W
R
i
= 3 k
W
R
f
Input
C
i
0.1
m
F
R
i
V
O1
Amp 1
Outputs
V
O2
Amp 2
C
1
= 5
m
F
32
1
m
F
8
0
8
10
93 7797 e
2
4
C
2
(
m
F )
6
0
1
10
100
Figure 1.
100
80
99.33
92.67
Phase ( Degrees )
PSSR ( dB )
60
50
C
1
Figure 3.
w
1
m
F
C
2
= 10
m
F
Phase
C
1
= 0.1
m
F
G (dB )
60
86.00
40
30
C
1
= 0
40
Gain
20
0
0.1
94 7839 e
79.33
72.67
66.00
1000
20
10
0.1
93 7798 e
1
10
f ( kH )
100
1
f ( kHz )
10
100
Figure 2.
Figure 4.
TELEFUNKEN Semiconductors
Rev. A2, 07-Apr-97
5 (11)
Preliminary Information
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