PALCE20V8H-20/BLA datasheet, PDF

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PALCE20V8H-20/BLA: DescriptionEE PLD, 20ns, PAL-Type, CMOS, CDIP24, 0.300 INCH, SKINNY, CERAMIC, DIP-24; CategoryProgrammable logic devices Programmable logic; File Size1MB，34 Pages; ManufacturerAMD; Websitehttp://www.amd.com

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PALCE20V8H-20/BLA Overview

EE PLD, 20ns, PAL-Type, CMOS, CDIP24, 0.300 INCH, SKINNY, CERAMIC, DIP-24

PALCE20V8H-20/BLA Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	AMD
Parts packaging code	DIP
package instruction	DIP, DIP24,.3
Contacts	24
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Other features	PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; POWER-UP RESET
Architecture	PAL-TYPE
maximum clock frequency	33.3 MHz
JESD-30 code	R-CDIP-T24
JESD-609 code	e0
length	31.9405 mm
Dedicated input times	12
Number of I/O lines	8
Number of entries	20
Output times	8
Number of product terms	64
Number of terminals	24
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	12 DEDICATED INPUTS, 8 I/O
Output function	MACROCELL
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Encapsulate equivalent code	DIP24,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Programmable logic type	EE PLD
propagation delay	20 ns
Certification status	Not Qualified
Filter level	38535Q/M;38534H;883B
Maximum seat height	5.08 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm

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Description	EE PLD, 20ns, PAL-Type, CMOS, CDIP24, 0.300 INCH, SKINNY, CERAMIC, DIP-24	EE PLD, 15ns, PAL-Type, CMOS, CQCC28, CERAMIC, LCC-28	EE PLD, 15ns, PAL-Type, CMOS, CDIP24, 0.300 INCH, SKINNY, CERAMIC, DIP-24	EE PLD, 20ns, PAL-Type, CMOS, CQCC28, CERAMIC, LCC-28	EE PLD, 20ns, PAL-Type, CMOS, CQCC28, CERAMIC, LCC-28	EE PLD, 25ns, PAL-Type, CMOS, CQCC28, CERAMIC, LCC-28	EE PLD, 20ns, PAL-Type, CMOS, CDIP24, 0.300 INCH, SKINNY, CERAMIC, DIP-24	EE PLD, 25ns, PAL-Type, CMOS, CDIP24, 0.300 INCH, SKINNY, CERAMIC, DIP-24	EE PLD, 25ns, PAL-Type, CMOS, CQCC28, CERAMIC, LCC-28	EE PLD, 25ns, PAL-Type, CMOS, CDIP24, 0.300 INCH, SKINNY, CERAMIC, DIP-24
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Parts packaging code	DIP	QLCC	DIP	QLCC	QLCC	QLCC	DIP	DIP	QLCC	DIP
package instruction	DIP, DIP24,.3	QCCN, LCC28,.45SQ	DIP, DIP24,.3	QCCN, LCC28,.45SQ	QCCN, LCC28,.45SQ	QCCN, LCC28,.45SQ	DIP, DIP24,.3	DIP, DIP24,.3	QCCN, LCC28,.45SQ	DIP, DIP24,.3
Contacts	24	28	24	28	28	28	24	24	28	24
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown
ECCN code	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C
Other features	PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; POWER-UP RESET	PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; POWER-UP RESET	PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; POWER-UP RESET	PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; POWER-UP RESET	PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; POWER-UP RESET	PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; POWER-UP RESET	PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; POWER-UP RESET	PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; POWER-UP RESET	PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; POWER-UP RESET	PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; POWER-UP RESET
Architecture	PAL-TYPE	PAL-TYPE	PAL-TYPE	PAL-TYPE	PAL-TYPE	PAL-TYPE	PAL-TYPE	PAL-TYPE	PAL-TYPE	PAL-TYPE
maximum clock frequency	33.3 MHz	41.6 MHz	41.6 MHz	33.3 MHz	33.3 MHz	25 MHz	33.3 MHz	25 MHz	25 MHz	25 MHz
JESD-30 code	R-CDIP-T24	S-CQCC-N28	R-CDIP-T24	S-CQCC-N28	S-CQCC-N28	S-CQCC-N28	R-CDIP-T24	R-CDIP-T24	S-CQCC-N28	R-CDIP-T24
JESD-609 code	e0	e0	e0	e0	e0	e0	e0	e0	e0	e0
length	31.9405 mm	11.43 mm	31.9405 mm	11.43 mm	11.43 mm	11.43 mm	31.9405 mm	31.9405 mm	11.43 mm	31.9405 mm
Dedicated input times	12	12	12	12	12	12	12	12	12	12
Number of I/O lines	8	8	8	8	8	8	8	8	8	8
Number of entries	20	20	20	20	20	20	20	20	20	20
Output times	8	8	8	8	8	8	8	8	8	8
Number of product terms	64	64	64	64	64	64	64	64	64	64
Number of terminals	24	28	24	28	28	28	24	24	28	24
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C
organize	12 DEDICATED INPUTS, 8 I/O	12 DEDICATED INPUTS, 8 I/O	12 DEDICATED INPUTS, 8 I/O	12 DEDICATED INPUTS, 8 I/O	12 DEDICATED INPUTS, 8 I/O	12 DEDICATED INPUTS, 8 I/O	12 DEDICATED INPUTS, 8 I/O	12 DEDICATED INPUTS, 8 I/O	12 DEDICATED INPUTS, 8 I/O	12 DEDICATED INPUTS, 8 I/O
Output function	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP	QCCN	DIP	QCCN	QCCN	QCCN	DIP	DIP	QCCN	DIP
Encapsulate equivalent code	DIP24,.3	LCC28,.45SQ	DIP24,.3	LCC28,.45SQ	LCC28,.45SQ	LCC28,.45SQ	DIP24,.3	DIP24,.3	LCC28,.45SQ	DIP24,.3
Package shape	RECTANGULAR	SQUARE	RECTANGULAR	SQUARE	SQUARE	SQUARE	RECTANGULAR	RECTANGULAR	SQUARE	RECTANGULAR
Package form	IN-LINE	CHIP CARRIER	IN-LINE	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER	IN-LINE	IN-LINE	CHIP CARRIER	IN-LINE
power supply	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
Programmable logic type	EE PLD	EE PLD	EE PLD	EE PLD	EE PLD	EE PLD	EE PLD	EE PLD	EE PLD	EE PLD
propagation delay	20 ns	15 ns	15 ns	20 ns	20 ns	25 ns	20 ns	25 ns	25 ns	25 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Filter level	38535Q/M;38534H;883B	38535Q/M;38534H;883B	38535Q/M;38534H;883B	38535Q/M;38534H;883B	38535Q/M;38534H;883B	38535Q/M;38534H;883B	38535Q/M;38534H;883B	38535Q/M;38534H;883B	38535Q/M;38534H;883B	38535Q/M;38534H;883B
Maximum seat height	5.08 mm	2.54 mm	5.08 mm	2.54 mm	2.54 mm	2.54 mm	5.08 mm	5.08 mm	2.54 mm	5.08 mm
Maximum supply voltage	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	YES	NO	YES	YES	YES	NO	NO	YES	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE	NO LEAD	THROUGH-HOLE	NO LEAD	NO LEAD	NO LEAD	THROUGH-HOLE	THROUGH-HOLE	NO LEAD	THROUGH-HOLE
Terminal pitch	2.54 mm	1.27 mm	2.54 mm	1.27 mm	1.27 mm	1.27 mm	2.54 mm	2.54 mm	1.27 mm	2.54 mm
Terminal location	DUAL	QUAD	DUAL	QUAD	QUAD	QUAD	DUAL	DUAL	QUAD	DUAL
width	7.62 mm	11.43 mm	7.62 mm	11.43 mm	11.43 mm	11.43 mm	7.62 mm	7.62 mm	11.43 mm	7.62 mm
Maker	AMD	-	-	AMD	AMD	AMD	AMD	AMD	AMD	AMD

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