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Am29LV001BB-90FI

Description
128K X 8 FLASH 3V PROM, 55 ns, PQCC32
Categorystorage    storage   
File Size210KB,38 Pages
ManufacturerAMD
Websitehttp://www.amd.com
Download Datasheet Parametric View All

Am29LV001BB-90FI Overview

128K X 8 FLASH 3V PROM, 55 ns, PQCC32

Am29LV001BB-90FI Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerAMD
Parts packaging codeTSOP1
package instructionTSOP1-R, TSSOP32,.8,20
Contacts32
Reach Compliance Codeunknow
ECCN codeEAR99
Maximum access time90 ns
Other featuresMINIMUM 1000K WRITE CYCLES; 20 YEAR DATA RETENTION
startup blockBOTTOM
command user interfaceYES
Data pollingYES
Data retention time - minimum20
JESD-30 codeR-PDSO-G32
JESD-609 codee0
length18.4 mm
memory density1048576 bi
Memory IC TypeFLASH
memory width8
Number of functions1
Number of departments/size1,2,7
Number of terminals32
word count131072 words
character code128000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize128KX8
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP1-R
Encapsulate equivalent codeTSSOP32,.8,20
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
power supply3/3.3 V
Programming voltage3 V
Certification statusNot Qualified
reverse pinoutYES
Maximum seat height1.2 mm
Department size8K,4K,16K
Maximum standby current0.000005 A
Maximum slew rate0.03 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
switch bitYES
typeNOR TYPE
width8 mm
PRELIMINARY
Am29LV001B
1 Megabit (128 K x 8-Bit)
CMOS 3.0 Volt-only Boot Sector Flash Memory
DISTINCTIVE CHARACTERISTICS
s
Single power supply operation
— Full voltage range: 2.7 to 3.6 volt read and write
operations for battery-powered applications
— Regulated voltage range: 3.0 to 3.6 volt read and
write operations and for compatibility with high
performance 3.3 volt microprocessors
s
Manufactured on 0.35 µm process technology
s
High performance
— Full voltage range: access times as fast as 55 ns
— Regulated voltage range: access times as fast
as 45 ns
s
Ultra low power consumption (typical values at
5 MHz)
— 200 nA Automatic Sleep mode current
— 200 nA standby mode current
— 7 mA read current
— 15 mA program/erase current
s
Flexible sector architecture
— One 8 Kbyte, two 4 Kbyte, and seven 16 Kbyte
— Supports full chip erase
— Sector Protection features:
Hardware method of locking a sector to prevent
any program or erase operations within that
sector
Sectors can be locked in-system or via
programming equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
s
Unlock Bypass Mode Program Command
— Reduces overall programming time when
issuing multiple program command sequences
s
Top or bottom boot block configurations
available
s
Embedded Algorithms
— Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
— Embedded Program algorithm automatically
writes and verifies data at specified addresses
s
Minimum 1,000,000 write cycle guarantee per
sector
s
Package option
— 32-pin TSOP
— 32-pin PLCC
s
Compatibility with JEDEC standards
— Pinout and software compatible with single-
power supply Flash
— Superior inadvertent write protection
s
Data# Polling and toggle bits
— Provides a software method of detecting
program or erase operation completion
s
Erase Suspend/Erase Resume
— Supports reading data from or programming
data to a sector that is not being erased
s
Hardware reset pin (RESET#)
— Hardware method for resetting the device to
reading array data
Publication#
21557
Rev:
C
Amendment/0
Issue Date:
April 1998
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