FT6198AL-35PC datasheet, PDF - EEWORLD Datasheet

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FT6198AL-35PC: DescriptionStandard SRAM, 16KX4, 35ns, CMOS, PDIP24, 0.300 INCH, PLASTIC, DIP-24; Categorystorage storage; File Size2MB，14 Pages; ManufacturerForce Technologies Ltd.

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FT6198AL-35PC Overview

Standard SRAM, 16KX4, 35ns, CMOS, PDIP24, 0.300 INCH, PLASTIC, DIP-24

FT6198AL-35PC Parametric

Parameter Name	Attribute value
Maker	Force Technologies Ltd.
Parts packaging code	DIP
package instruction	DIP,
Contacts	24
Reach Compliance Code	unknown
ECCN code	EAR99
Maximum access time	35 ns
JESD-30 code	R-PDIP-T24
length	31.87 mm
memory density	65536 bit
Memory IC Type	STANDARD SRAM
memory width	4
Number of functions	1
Number of terminals	24
word count	16384 words
character code	16000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	16KX4
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
Certification status	Not Qualified
Maximum seat height	5.33 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	15.24 mm

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FT6198(L)

FT6198A(L)

FEATURES

Full CMOS, 6T Cell

High Speed (Equal Access and Cycle Times)

– 10/12/15/20/25 ns (Commercial)

– 12/15/20/25/35 ns (Industrial)

– 15/20/25/35/45 ns (Military)

Low Power Operation (Commercial/Military)

5V ± 10% Power Supply

Data Retention, 10

µA

Typical Current from 2.0V

FT6198L/FT6198AL

(Military)

Ultra High Speed 16K x 4

Static CMOS Ram

Output Enable & Chip Enable Control Functions

– Single Chip Enable

FT6198

– Dual Chip Enable

FT6198A

Common Inputs and Outputs

Fully TTL Compatible Inputs and Outputs

Standard Pinout (JEDEC Approved)

– 24-Pin 300 mil DIP

– 24-Pin 300 mil SOJ

– 28-Pin 350 x 550 mil LCC

DESCRIPTION

The

FT6198/L

and

FT6198A/L

are 65,536-bit ultra high-

speed static RAMs organized as 16K x 4. Each device

features an active low Output Enable control to eliminate

data bus contention. The

FT6198/L

also have an active

low Chip Enable (the

FT6198A/L

have two Chip Enables,

both active low) for easy system expansion. The CMOS

memories require no clocks or refreshing and have equal

access and cycle times. Inputs are fully TTL-compatible.

The RAMs operate from a single 5V ± 10% tolerance

power supply. Data integrity is maintained with supply

voltages down to 2.0V. Current drain is typically 10

µA

from a 2.0V supply.

Access times as fast as 12 nanoseconds are available,

permitting greatly enhanced system operating speeds.

CMOS is used to reduce power consumption to a low 715

mW active, 193 mW standby.

The

FT6198/L

and

FT6198A/L

are available in 24-pin

300 mil DIP and SOJ, and 28-pin 350 x 550 mil LCC

packages providing excellent board level densities.

FUNCTIONAL BLOCK DIAGRAM

PIN CONFIGURATIONS

FT6198A ONLY

DIP (P4, C4, D4),

SOJ (J4)

FT6198

(FT6198A)

LCC (L5)

FT6198

(FT6198A)

REV 1

1/14

2008

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Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

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