IC FPGA, 547 CLBS, 2000 GATES, 100 MHz, PQCC84, Field Programmable Gate Array
| Parameter Name | Attribute value |
| Is it Rohs certified? | incompatible |
| Maker | Texas Instruments |
| package instruction | QCCJ, LDCC84,1.2SQ |
| Reach Compliance Code | not_compliant |
| Other features | MAX 69 I/OS; 273 FLIP-FLOPS |
| maximum clock frequency | 100 MHz |
| Combined latency of CLB-Max | 17.82 ns |
| JESD-30 code | S-PQCC-J84 |
| length | 29.3116 mm |
| Configurable number of logic blocks | 547 |
| Equivalent number of gates | 2000 |
| Number of entries | 69 |
| Number of logical units | 547 |
| Output times | 69 |
| Number of terminals | 84 |
| Maximum operating temperature | 85 °C |
| Minimum operating temperature | -40 °C |
| organize | 547 CLBS, 2000 GATES |
| Package body material | PLASTIC/EPOXY |
| encapsulated code | QCCJ |
| Encapsulate equivalent code | LDCC84,1.2SQ |
| Package shape | SQUARE |
| Package form | CHIP CARRIER |
| Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
| power supply | 5 V |
| Programmable logic type | FIELD PROGRAMMABLE GATE ARRAY |
| Certification status | Not Qualified |
| Maximum seat height | 4.57 mm |
| Maximum supply voltage | 5.5 V |
| Minimum supply voltage | 4.5 V |
| Nominal supply voltage | 5 V |
| surface mount | YES |
| technology | CMOS |
| Temperature level | INDUSTRIAL |
| Terminal form | J BEND |
| Terminal pitch | 1.27 mm |
| Terminal location | QUAD |
| Maximum time at peak reflow temperature | NOT SPECIFIED |
| width | 29.3116 mm |
| TPC1020AFN-084I | TPC1010AFN-068C | TPC1010AFN-068I | TPC1010AFN-044C | TPC1010AFN-044I | TPC1020AFN-084C | TPC1020AFN-068C | TPC1020AFN-068I | TPC1020AFN-044I | TPC1020AFN-044C | |
|---|---|---|---|---|---|---|---|---|---|---|
| Description | IC FPGA, 547 CLBS, 2000 GATES, 100 MHz, PQCC84, Field Programmable Gate Array | FPGA, 295 CLBS, 1200 GATES, 100MHz, PQCC68 | FPGA, 295 CLBS, 1200 GATES, 100MHz, PQCC68 | IC FPGA, 295 CLBS, 1200 GATES, 100 MHz, PQCC44, Field Programmable Gate Array | FPGA, 295 CLBS, 1200 GATES, 100MHz, PQCC44 | FPGA, 547 CLBS, 2000 GATES, 100MHz, PQCC84 | FPGA, 547 CLBS, 2000 GATES, 100MHz, PQCC68 | FPGA, 547 CLBS, 2000 GATES, 100MHz, PQCC68 | FPGA, 547 CLBS, 2000 GATES, 100MHz, PQCC44 | FPGA, 547 CLBS, 2000 GATES, 100MHz, PQCC44 |
| Is it Rohs certified? | incompatible | incompatible | incompatible | incompatible | incompatible | incompatible | incompatible | incompatible | incompatible | incompatible |
| Maker | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| package instruction | QCCJ, LDCC84,1.2SQ | QCCJ, LDCC68,1.0SQ | QCCJ, LDCC68,1.0SQ | QCCJ, LDCC44,.7SQ | QCCJ, LDCC44,.7SQ | QCCJ, LDCC84,1.2SQ | QCCJ, LDCC68,1.0SQ | QCCJ, LDCC68,1.0SQ | QCCJ, LDCC44,.7SQ | QCCJ, LDCC44,.7SQ |
| Reach Compliance Code | not_compliant | not_compliant | not_compliant | not_compliant | not_compliant | not_compliant | not_compliant | not_compliant | not_compliant | not_compliant |
| Other features | MAX 69 I/OS; 273 FLIP-FLOPS | MAX 57 I/OS; 130 FLIP-FLOPS | MAX 57 I/OS; 130 FLIP-FLOPS | MAX 34 I/OS; 130 FLIP-FLOPS | MAX 34 I/OS; 130 FLIP-FLOPS | MAX 69 I/OS; 273 FLIP-FLOPS | MAX 57 I/OS; 273 FLIP-FLOPS | MAX 57 I/OS; 273 FLIP-FLOPS | MAX 34 I/OS; 273 FLIP-FLOPS | MAX 34 I/OS; 273 FLIP-FLOPS |
| Combined latency of CLB-Max | 17.82 ns | 16.632 ns | 17.82 ns | 16.632 ns | 17.82 ns | 16.632 ns | 16.632 ns | 17.82 ns | 17.82 ns | 16.632 ns |
| JESD-30 code | S-PQCC-J84 | S-PQCC-J68 | S-PQCC-J68 | S-PQCC-J44 | S-PQCC-J44 | S-PQCC-J84 | S-PQCC-J68 | S-PQCC-J68 | S-PQCC-J44 | S-PQCC-J44 |
| length | 29.3116 mm | 24.2316 mm | 24.2316 mm | 16.5862 mm | 16.5862 mm | 29.3116 mm | 24.2316 mm | 24.2316 mm | 16.5862 mm | 16.5862 mm |
| Configurable number of logic blocks | 547 | 295 | 295 | 295 | 295 | 547 | 547 | 547 | 547 | 547 |
| Equivalent number of gates | 2000 | 1200 | 1200 | 1200 | 1200 | 2000 | 2000 | 2000 | 2000 | 2000 |
| Number of entries | 69 | 57 | 57 | 57 | 57 | 69 | 69 | 69 | 69 | 69 |
| Number of logical units | 547 | 295 | 295 | 295 | 295 | 547 | 547 | 547 | 547 | 547 |
| Output times | 69 | 57 | 57 | 57 | 57 | 69 | 69 | 69 | 69 | 69 |
| Number of terminals | 84 | 68 | 68 | 44 | 44 | 84 | 68 | 68 | 44 | 44 |
| Maximum operating temperature | 85 °C | 70 °C | 85 °C | 70 °C | 85 °C | 70 °C | 70 °C | 85 °C | 85 °C | 70 °C |
| organize | 547 CLBS, 2000 GATES | 295 CLBS, 1200 GATES | 295 CLBS, 1200 GATES | 295 CLBS, 1200 GATES | 295 CLBS, 1200 GATES | 547 CLBS, 2000 GATES | 547 CLBS, 2000 GATES | 547 CLBS, 2000 GATES | 547 CLBS, 2000 GATES | 547 CLBS, 2000 GATES |
| Package body material | PLASTIC/EPOXY | PLASTIC/EPOXY | PLASTIC/EPOXY | PLASTIC/EPOXY | PLASTIC/EPOXY | PLASTIC/EPOXY | PLASTIC/EPOXY | PLASTIC/EPOXY | PLASTIC/EPOXY | PLASTIC/EPOXY |
| encapsulated code | QCCJ | QCCJ | QCCJ | QCCJ | QCCJ | QCCJ | QCCJ | QCCJ | QCCJ | QCCJ |
| Encapsulate equivalent code | LDCC84,1.2SQ | LDCC68,1.0SQ | LDCC68,1.0SQ | LDCC44,.7SQ | LDCC44,.7SQ | LDCC84,1.2SQ | LDCC68,1.0SQ | LDCC68,1.0SQ | LDCC44,.7SQ | LDCC44,.7SQ |
| Package shape | SQUARE | SQUARE | SQUARE | SQUARE | SQUARE | SQUARE | SQUARE | SQUARE | SQUARE | SQUARE |
| Package form | CHIP CARRIER | CHIP CARRIER | CHIP CARRIER | CHIP CARRIER | CHIP CARRIER | CHIP CARRIER | CHIP CARRIER | CHIP CARRIER | CHIP CARRIER | CHIP CARRIER |
| Peak Reflow Temperature (Celsius) | NOT SPECIFIED | NOT SPECIFIED | NOT SPECIFIED | NOT SPECIFIED | NOT SPECIFIED | NOT SPECIFIED | NOT SPECIFIED | NOT SPECIFIED | NOT SPECIFIED | NOT SPECIFIED |
| power supply | 5 V | 5 V | 5 V | 5 V | 5 V | 5 V | 5 V | 5 V | 5 V | 5 V |
| Programmable logic type | FIELD PROGRAMMABLE GATE ARRAY | FIELD PROGRAMMABLE GATE ARRAY | FIELD PROGRAMMABLE GATE ARRAY | FIELD PROGRAMMABLE GATE ARRAY | FIELD PROGRAMMABLE GATE ARRAY | FIELD PROGRAMMABLE GATE ARRAY | FIELD PROGRAMMABLE GATE ARRAY | FIELD PROGRAMMABLE GATE ARRAY | FIELD PROGRAMMABLE GATE ARRAY | FIELD PROGRAMMABLE GATE ARRAY |
| Certification status | Not Qualified | Not Qualified | Not Qualified | Not Qualified | Not Qualified | Not Qualified | Not Qualified | Not Qualified | Not Qualified | Not Qualified |
| Maximum seat height | 4.57 mm | 4.57 mm | 4.57 mm | 4.57 mm | 4.57 mm | 4.57 mm | 4.57 mm | 4.57 mm | 4.57 mm | 4.57 mm |
| Maximum supply voltage | 5.5 V | 5.25 V | 5.5 V | 5.25 V | 5.5 V | 5.25 V | 5.25 V | 5.5 V | 5.5 V | 5.25 V |
| Minimum supply voltage | 4.5 V | 4.75 V | 4.5 V | 4.75 V | 4.5 V | 4.75 V | 4.75 V | 4.5 V | 4.5 V | 4.75 V |
| Nominal supply voltage | 5 V | 5 V | 5 V | 5 V | 5 V | 5 V | 5 V | 5 V | 5 V | 5 V |
| surface mount | YES | YES | YES | YES | YES | YES | YES | YES | YES | YES |
| technology | CMOS | CMOS | CMOS | CMOS | CMOS | CMOS | CMOS | CMOS | CMOS | CMOS |
| Temperature level | INDUSTRIAL | COMMERCIAL | INDUSTRIAL | COMMERCIAL | INDUSTRIAL | COMMERCIAL | COMMERCIAL | INDUSTRIAL | INDUSTRIAL | COMMERCIAL |
| Terminal form | J BEND | J BEND | J BEND | J BEND | J BEND | J BEND | J BEND | J BEND | J BEND | J BEND |
| Terminal pitch | 1.27 mm | 1.27 mm | 1.27 mm | 1.27 mm | 1.27 mm | 1.27 mm | 1.27 mm | 1.27 mm | 1.27 mm | 1.27 mm |
| Terminal location | QUAD | QUAD | QUAD | QUAD | QUAD | QUAD | QUAD | QUAD | QUAD | QUAD |
| Maximum time at peak reflow temperature | NOT SPECIFIED | NOT SPECIFIED | NOT SPECIFIED | NOT SPECIFIED | NOT SPECIFIED | NOT SPECIFIED | NOT SPECIFIED | NOT SPECIFIED | NOT SPECIFIED | NOT SPECIFIED |
| width | 29.3116 mm | 24.2316 mm | 24.2316 mm | 16.5862 mm | 16.5862 mm | 29.3116 mm | 24.2316 mm | 24.2316 mm | 16.5862 mm | 16.5862 mm |
| maximum clock frequency | 100 MHz | 100 MHz | 100 MHz | 100 MHz | 100 MHz | - | - | 100 MHz | 100 MHz | 100 MHz |