FST16292 12-Bit to 24-Bit Multiplexer/Demultiplexer Bus Switch
July 1997
Revised November 2000
FST16292
12-Bit to 24-Bit Multiplexer/Demultiplexer Bus Switch
General Description
The Fairchild Switch FST16292 provides twelve 2:1 high-
speed CMOS TTL-compatible multiplexer/demultiplexer
bus switches. The low on resistance of the switch allows
inputs to be connected to outputs without adding propaga-
tion delay or generating additional ground bounce noise.
The select pin connects the A Port to the selected B Port
output. The A
2
Ports are not externally connected, thus
have a 500
Ω
pull-down resistor to ground.
Features
s
4
Ω
switch connection between two ports.
s
Minimal propagation delay through the switch.
s
Low l
CC
.
s
Zero bounce in flow-through mode.
s
Control inputs compatible with TTL level.
s
Internal 500
Ω
pull-down resistor on A
2
Port.
Ordering Code:
Order Number
FST16292MEA
FST16292MTD
Package Number
MS56A
MTD56
Package Description
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
Pin Descriptions
Pin Name
S
A
1
B
1
, B
2
Description
Data-select input
Bus A
Bus B
Truth Table
S
L
H
A
1
B
1
B
2
A
2
B
2
B
1
Function
A
1
=
B
1
, A
2
=
B
2
A
1
=
B
2
, A
2
=
B
1
© 2000 Fairchild Semiconductor Corporation
DS500104
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FST16292
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
DC Switch Voltage (V
S
)
DC Input Voltage (V
IN
) (Note 2)
DC Input Diode Current (l
IK
) V
IN
<
0V
DC Output (I
OUT
) Sink Current
DC V
CC
/GND Current (I
CC
/I
GND
)
Storage Temperature Range (T
STG
)
−
0.5V to
+
7.0V
−
0.5V to
+
7.0V
−
0.5V to
+
7.0V
−
50mA
128mA
Recommended Operating
Conditions
Power Supply Operating (V
CC
)
Input Voltage (V
IN
)
Output Voltage (V
OUT
)
Input Rise and Fall Time (t
r
, t
f
)
Switch Control Input
Switch I/O
Free Air Operating Temperature (T
A
)
0ns/V to 5ns/V
0ns/V to DC
4.0V to 5.5V
0V to 5.5V
0V to 5.5V
+
/
−
100mA
−
65
°
C to
+
150
°
C
−
40
°
C to
+
85
°
C
Note 1:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2:
The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
DC Electrical Characteristics
Symbol
V
IK
V
IH
V
IL
I
I
I
OZ
R
ON
Parameter
Clamp Diode Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
Input Leakage Current
OFF-STATE Leakage Current
Switch On Resistance
(Note 4)
V
CC
(V)
4.5
4.0–5.5
4.0–5.5
5.5
0
5.5
4.5
4.5
4.5
4.0
I
CC
∆
I
CC
Quiescent Supply Current
Increase in I
CC
per Input
5.5
5.5
4
4
8
14
2.0
0.8
±1.0
10
±1.0
7
7
12
20
3
2.5
T
A
= −40 °C
to
+85 °C
Min
Typ
(Note 3)
Max
−1.2
Units
V
V
V
µA
µA
µA
Ω
Ω
Ω
Ω
µA
mA
0≤ V
IN
≤
5.5V
V
IN
=
5.5V
0
≤A,
B
≤
V
CC
V
IN
=
0V, I
IN
=
64mA
V
IN
=
0V, I
IN
=
30mA
V
IN
=
2.4V, I
IN
=
15mA
V
IN
=
2.4V, I
IN
=
15mA
V
IN
=
V
CC
or GND, I
OUT
=
0
One input at 3.4V
Other inputs at V
CC
or GND
Note 3:
Typical values are at V
CC
=
5.0V and T
A
=+25°C
Note 4:
Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
Conditions
I
IN
= −18mA
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2
FST16292
AC Electrical Characteristics
T
A
= −40 °C
to
+85 °C,
Symbol
Parameter
C
L
=
50pF, RU
=
RD
=
500Ω
V
CC
=
4.5 – 5.5V
Min
t
PHL
, t
PLH
t
PHL
, t
PLH
t
PZL
, t
PZH
t
PLZ
, t
PHZ
Prop Delay Bus to Bus (Note 5)
Prop Delay S to A
1
Output Enable Time
S to B
1
or B
2
Output Disable Time
S to B
1
or B
2
1.5
Max
0.25
7.0
V
CC
=
4.0V
Min
Max
0.25
7.4
ns
ns
V
I
=
OPEN
V
I
=
OPEN
V
I
=
7V for t
PZL
V
I
=
OPEN for t
PZH
V
I
=
7V for t
PLZ
V
I
=
OPEN for t
PHZ
Figures
1, 2
Figures
1, 2
Figures
1, 2
Figures
1, 2
Units
Conditions
Figure
No.
1.0
1.0
6.7
7.5
7.0
7.8
ns
ns
Note 5:
This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol
C
IN
C
I/O
(Note 6)
Parameter
Typ
3
10
Max
Units
pF
pF
Conditions
V
CC
=
5.0V
V
CC
=
5.0V, S0
=GND
Control Pin Input Capacitance
Input/Output Capacitance
Note 6:
T
A
= +25°C,
f
=
1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50
Ω
source terminated in 50
Ω
Note: C
L
includes load and stray capacitance
Note: Input PRR
=
1.0 MHz, t
W
=
500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
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FST16292
Physical Dimensions
inches (millimeters) unless otherwise noted
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
Package Number MS56A
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4
FST16292 12-Bit to 24-Bit Multiplexer/Demultiplexer Bus Switch
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD56
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
5
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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