FT6187L-45LMB datasheet, PDF - EEWORLD Datasheet

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FT6187L-45LMB: DescriptionStandard SRAM, 64KX1, 45ns, CMOS, 0.290 X 0.490 INCH, LCC-22; Categorystorage storage; File Size472KB，13 Pages; ManufacturerForce Technologies Ltd.

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FT6187L-45LMB Overview

Standard SRAM, 64KX1, 45ns, CMOS, 0.290 X 0.490 INCH, LCC-22

FT6187L-45LMB Parametric

Parameter Name	Attribute value
Maker	Force Technologies Ltd.
Parts packaging code	LCC
package instruction	QCCN,
Contacts	22
Reach Compliance Code	compliant
ECCN code	3A001.A.2.C
Maximum access time	45 ns
JESD-30 code	R-XQCC-N22
length	12.446 mm
memory density	65536 bit
Memory IC Type	STANDARD SRAM
memory width	1
Number of functions	1
Number of terminals	22
word count	65536 words
character code	64000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	64KX1
Package body material	UNSPECIFIED
encapsulated code	QCCN
Package shape	RECTANGULAR
Package form	CHIP CARRIER
Parallel/Serial	PARALLEL
Certification status	Not Qualified
Filter level	MIL-STD-883
Maximum seat height	2.032 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	QUAD
width	7.366 mm

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FT6187/FT6187L

FEATURES

Full CMOS, 6T Cell

High Speed (Equal Access and Cycle Times)

– 10/12/15/20/25/35/45 ns (Commercial)

– 12/15/20/25/35 /45 ns (Industrial)

– 15/20/25/35/45/55/70/85 ns (Military)

Low Power Operation

– 743 mW Active -10

– 660/770 mW Active for -12/15

– 550/660 mW Active for -20/25/35

– 193/220 mW Standby (TTL Input)

– 83/110 mW Standby (CMOS Input) P4C187

– 5.5 mW Standby (CMOS Input)

FT6187L

(Military)

Single 5V±10% Power Supply

Ultra High Speed 64K x 1

Static Cmos Rams

Data Retention with 2.0V Supply (FT6187L

Military)

Separate Data I/O

Three-State Output

TTL Compatible Output

Fully TTL Compatible Inputs

Standard Pinout (JEDEC Approved)

– 22-Pin 300 mil DIP

– 24-Pin 300 mil SOJ

– 22-Pin 290x490 mil LCC

– 28-Pin 350x550 mil LCC

DESCRIPTION

The

FT6187/FT6187L

are 65, 536-bit ultra high speed

static RAMs organised as 64K x 1. The CMOS memories

require no clocks or refreshing and have equal access and

cycle times. The RAMs operate from a single 5V ± 10%

tolerance power supply. Data integrity is maintained for sup-

ply voltages down to 2.0V, typically drawing 10µA.

Access times as fast as 10 nanoseconds are available,

greatly enhancing system speeds. CMOS reduces power

consumption to a low 743mW active, 193/83mW standby

for TTL/CMOS inputs and only 5.5 mW standby for the

FT6187L.

The

FT6187/FT6187L

are available in 22-pin 300 mil DIP,

24-pin 300 mil SOJ, 22-pin and 28-pin LCC packages pro-

viding excellent board level densities.

FUNCTIONAL BLOCK DIAGRAM

PIN CONFIGURATIONS

DIP (P3, D3, C3)

SOJ (J4)

LCC Pin configurations at end of datasheet.

REV 1.1

1/13

2008

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