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ICS8432AY-101T

Description
PLL Based Clock Driver, 2 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32
Categorylogic    logic   
File Size115KB,10 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric Compare View All

ICS8432AY-101T Overview

PLL Based Clock Driver, 2 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32

ICS8432AY-101T Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeQFP
package instructionLQFP,
Contacts32
Reach Compliance Codecompliant
Input adjustmentDIFFERENTIAL MUX
JESD-30 codeS-PQFP-G32
JESD-609 codee0
length7 mm
Logic integrated circuit typePLL BASED CLOCK DRIVER
Humidity sensitivity level3
Number of functions1
Number of inverted outputs
Number of terminals32
Actual output times2
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeLQFP
Package shapeSQUARE
Package formFLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius)240
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.01 ns
Maximum seat height1.6 mm
Maximum supply voltage (Vsup)3.465 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationQUAD
Maximum time at peak reflow temperature20
width7 mm
minfmax700 MHz
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS8432-101
700MH
Z
, L
OW
P
HASE
N
OISE
,
LVPECL F
REQUENCY
S
YNTHESIZER
F
EATURES
FOUT0 and FOUT1 differential 3.3V LVPECL outputs
Selectable CLK, nCLK and LVCMOS reference inputs
CLK, nCLK pair can accept the following differential input
levels: LVPECL, LVHSTL, LVDS, SSTL
Maximum output frequency: 31.25MHz to 700MHz
Differential input or reference input frequency:
14MHz to 25MHz
VCO range: 250MHz - 700MHz
Accepts any single-ended input signal to LVCMOS with
resistor bias on nCLK input
Parallel interface for programming counter and output
dividers
3.3V supply voltage
0°C to 70°C ambient operating temperature
G
ENERAL
D
ESCRIPTION
The ICS8432-101 is a general purpose, dual out-
put high frequency synthesizer and a member of
HiPerClockS™
the HiPerClockS™ family of High Performance
Clocks Solutions from ICS. The VCO operates at
a frequency range of 250MHz to 700MHz. The
VCO frequency is programmed in steps equal to the value of
the input differential or single ended reference frequency. The
VCO and output frequency can be programmed using the serial
or parallel interfaces to the configuration logic. The low phase
noise characteristics of the ICS8432-101 makes it an ideal clock
source for Gigabit Ethernet, Fiber Channel 1 and 2, Infiniband
and Sonet OC3 and OC12 applications.
,&6
B
LOCK
D
IAGRAM
VCO_SEL
CLK_SEL
TEST_CLK
CLK
nCLK
0
P
IN
A
SSIGNMENT
VCO_SEL
nP_LOAD
nCLK
M4
M3
M2
M1
M0
32 31 30 29 28 27 26 25
1
M5
M6
M7
M8
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
TEST
VCC
FOUT1
nFOUT1
VCCO
FOUT0
nFOUT0
VEE
24
23
22
CLK
TEST_CLK
CLK_SEL
VCCA
S_LOAD
S_DATA
S_CLOCK
MR
PLL
PHASE DETECTOR
MR
÷
M
VCO
0
÷
N
1
N0
N1
nc
FOUT0
nFOUT0
FOUT1
nFOUT1
VEE
ICS8432-101
21
20
19
18
17
S_LOAD
S_DATA
S_CLOCK
nP_LOAD
M0:M8
N0:N1
CONFIGURATION
INTERFACE
LOGIC
TEST
32-Lead LQFP
7mm x 7mm x 1.4mm Package Body
Y Package
Top View
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
8432AY-101
www.icst.com/products/hiperclocks.html
1
REV. B JULY 30, 2001

ICS8432AY-101T Related Products

ICS8432AY-101T ICS8432AY-101LF ICS8432AY-101LFT ICS8432AY-101
Description PLL Based Clock Driver, 2 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32 PLL Based Clock Driver, 2 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32 PLL Based Clock Driver, 2 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32 PLL Based Clock Driver, 2 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32
Is it lead-free? Contains lead Lead free Lead free Contains lead
Is it Rohs certified? incompatible conform to conform to incompatible
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code QFP QFP QFP QFP
package instruction LQFP, LQFP, LQFP, LQFP,
Contacts 32 32 32 32
Reach Compliance Code compliant compliant compliant compliant
Input adjustment DIFFERENTIAL MUX DIFFERENTIAL MUX DIFFERENTIAL MUX DIFFERENTIAL MUX
JESD-30 code S-PQFP-G32 S-PQFP-G32 S-PQFP-G32 S-PQFP-G32
JESD-609 code e0 e3 e3 e0
length 7 mm 7 mm 7 mm 7 mm
Logic integrated circuit type PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER
Humidity sensitivity level 3 3 3 3
Number of functions 1 1 1 1
Number of terminals 32 32 32 32
Actual output times 2 2 2 2
Maximum operating temperature 70 °C 70 °C 70 °C 70 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code LQFP LQFP LQFP LQFP
Package shape SQUARE SQUARE SQUARE SQUARE
Package form FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius) 240 260 260 240
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Same Edge Skew-Max(tskwd) 0.01 ns 0.01 ns 0.01 ns 0.01 ns
Maximum seat height 1.6 mm 1.6 mm 1.6 mm 1.6 mm
Maximum supply voltage (Vsup) 3.465 V 3.465 V 3.465 V 3.465 V
Minimum supply voltage (Vsup) 3.135 V 3.135 V 3.135 V 3.135 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
Terminal surface Tin/Lead (Sn/Pb) Matte Tin (Sn) Matte Tin (Sn) Tin/Lead (Sn/Pb)
Terminal form GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.8 mm 0.8 mm 0.8 mm 0.8 mm
Terminal location QUAD QUAD QUAD QUAD
Maximum time at peak reflow temperature 20 30 30 20
width 7 mm 7 mm 7 mm 7 mm
minfmax 700 MHz 700 MHz 700 MHz 700 MHz
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