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HCS195KMSR

Description
HC/UH SERIES, 4-BIT RIGHT PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDFP16, METAL SEALED, CERAMIC, FP-16
Categorylogic    logic   
File Size227KB,9 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
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HCS195KMSR Overview

HC/UH SERIES, 4-BIT RIGHT PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDFP16, METAL SEALED, CERAMIC, FP-16

HCS195KMSR Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerRenesas Electronics Corporation
Parts packaging codeDFP
package instructionDFP, FL16,.3
Contacts16
Reach Compliance Codenot_compliant
Counting directionRIGHT
seriesHC/UH
JESD-30 codeR-CDFP-F16
JESD-609 codee0
Logic integrated circuit typePARALLEL IN PARALLEL OUT
Maximum Frequency@Nom-Sup20000000 Hz
Number of digits4
Number of functions1
Number of terminals16
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output polarityTRUE
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDFP
Encapsulate equivalent codeFL16,.3
Package shapeRECTANGULAR
Package formFLATPACK
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
propagation delay (tpd)42 ns
Certification statusNot Qualified
Filter levelMIL-PRF-38535 Class V
Maximum seat height2.92 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formFLAT
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
total dose200k Rad(Si) V
Trigger typePOSITIVE EDGE
width6.73 mm
minfmax20 MHz
HCS195MS
September 1995
Radiation Hardened Inverting
8-Bit Parallel-Input/Serial Output Shift Register
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16, LEAD FINISH C
TOP VIEW
MR
J
K
D0
D1
1
2
3
4
5
6
7
8
16 VCC
15 Q0
14 Q1
13 Q2
12 Q3
11 Q3
10 CP
9 PE
Features
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
• Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/
Bit-Day (Typ)
• Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
• Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Fanout (Over Temperature Range)
- Standard Outputs - 10 LSTTL Loads
• Military Temperature Range: -55
o
C to +125
o
C
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 0.3 VCC Max
- VIH = 0.7 VCC Min
• Input Current Levels Ii
5µA at VOL, VOH
D2
D3
GND
16 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F16, LEAD FINISH C
TOP VIEW
MR
J
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCC
Q0
Q1
Q2
Q3
Q3
CP
PE
Description
The Intersil HCS195MS is a Radiation Hardened 8-Bit Paral-
lel-In/Serial-Out Shift Register with complementary serial
outputs and an asynchronous parallel load input.
The HCS195MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS195MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
K
D0
D1
D2
D3
GND
Ordering Information
PART NUMBER
HCS195DMSR
HCS195KMSR
HCS195D/Sample
HCS195K/Sample
HCS195HMSR
TEMPERATURE RANGE
-55
o
C to +125
o
C
-55
o
C to +125
o
C
+25
o
C
+25
o
C
+25
o
C
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
16 Lead SBDIP
16 Lead Ceramic Flatpack
16 Lead SBDIP
16 Lead Ceramic Flatpack
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
Spec Number
File Number
280
518760
3385.1

HCS195KMSR Related Products

HCS195KMSR HCS195DMSR HCS195HMSR
Description HC/UH SERIES, 4-BIT RIGHT PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDFP16, METAL SEALED, CERAMIC, FP-16 HC/UH SERIES, 4-BIT RIGHT PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, CDIP16, SIDE BRAZED, CERAMIC, DIP-16 HC/UH SERIES, 4-BIT RIGHT PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, UUC16
Is it Rohs certified? incompatible incompatible incompatible
Maker Renesas Electronics Corporation Renesas Electronics Corporation Renesas Electronics Corporation
Parts packaging code DFP DIP DIE
package instruction DFP, FL16,.3 SIDE BRAZED, CERAMIC, DIP-16 DIE,
Contacts 16 16 16
Reach Compliance Code not_compliant not_compliant compliant
Counting direction RIGHT RIGHT RIGHT
series HC/UH HC/UH HC/UH
JESD-30 code R-CDFP-F16 R-CDIP-T16 R-XUUC-N16
Logic integrated circuit type PARALLEL IN PARALLEL OUT PARALLEL IN PARALLEL OUT PARALLEL IN PARALLEL OUT
Number of digits 4 4 4
Number of functions 1 1 1
Number of terminals 16 16 16
Output polarity TRUE TRUE TRUE
Package body material CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED UNSPECIFIED
encapsulated code DFP DIP DIE
Package shape RECTANGULAR RECTANGULAR RECTANGULAR
Package form FLATPACK IN-LINE UNCASED CHIP
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
propagation delay (tpd) 42 ns 42 ns 34 ns
Certification status Not Qualified Not Qualified Not Qualified
Filter level MIL-PRF-38535 Class V MIL-PRF-38535 Class V MIL-PRF-38535 Class V
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V 4.5 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V
surface mount YES NO YES
technology CMOS CMOS CMOS
Terminal form FLAT THROUGH-HOLE NO LEAD
Terminal location DUAL DUAL UPPER
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
total dose 200k Rad(Si) V 200k Rad(Si) V 200k Rad(Si) V
Trigger type POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE
minfmax 20 MHz 20 MHz 30 MHz
JESD-609 code e0 e0 -
Maximum Frequency@Nom-Sup 20000000 Hz 20000000 Hz -
Maximum operating temperature 125 °C 125 °C -
Minimum operating temperature -55 °C -55 °C -
Encapsulate equivalent code FL16,.3 DIP16,.3 -
power supply 5 V 5 V -
Maximum seat height 2.92 mm 5.08 mm -
Temperature level MILITARY MILITARY -
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) -
Terminal pitch 1.27 mm 2.54 mm -
width 6.73 mm 7.62 mm -
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