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KM48S8030DT-FL

Description
Synchronous DRAM, 8MX8, 6ns, CMOS, PDSO54, 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54
Categorystorage    storage   
File Size117KB,11 Pages
ManufacturerSAMSUNG
Websitehttp://www.samsung.com/Products/Semiconductor/
Download Datasheet Parametric View All

KM48S8030DT-FL Overview

Synchronous DRAM, 8MX8, 6ns, CMOS, PDSO54, 0.400 X 0.875 INCH, 0.80 MM PITCH, TSOP2-54

KM48S8030DT-FL Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerSAMSUNG
Parts packaging codeTSOP2
package instructionTSOP2, TSOP54,.46,32
Contacts54
Reach Compliance Codeunknown
ECCN codeEAR99
access modeFOUR BANK PAGE BURST
Maximum access time6 ns
Maximum clock frequency (fCLK)100 MHz
I/O typeCOMMON
interleaved burst length1,2,4,8
JESD-30 codeR-PDSO-G54
JESD-609 codee0
length22.22 mm
memory density67108864 bit
Memory IC TypeSYNCHRONOUS DRAM
memory width8
Number of functions1
Number of ports1
Number of terminals54
word count8388608 words
character code8000000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize8MX8
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP2
Encapsulate equivalent codeTSOP54,.46,32
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
power supply3.3 V
Certification statusNot Qualified
refresh cycle4096
Maximum seat height1.2 mm
Continuous burst length1,2,4,8,FP
Maximum standby current0.001 A
Maximum slew rate0.125 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationDUAL
width10.16 mm
KM48S8030D
CMOS SDRAM
64Mbit SDRAM
2M x 8Bit x 4 Banks
Synchronous DRAM
LVTTL
Revision 0.0
May 1999
* Samsung Electronics reserves the right to change products or specification without notice.
Rev. 0.0 May 1999
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