January 2007
rev 0.1
PCS811/PCS812
5-Pin µP Voltage Supervisor with Manual Reset
FEATURES
•
•
•
Ultra Low Supply Current 1µA(typ.)
Guaranteed Reset Valid to VCC=0.9V
Available in two Output Types: Push-Pull
Active Low (PCS811), Push-Pull Active High
(PCS812)
•
•
•
•
140ms Min. Power-On Reset Pulse Width
Internally Fixed Threshold 2.3V, 2.6V, 2.7V,
2.9V, 3.1V, 4.0V, 4.4V, and 4.6V
Tight Voltage Threshold Tolerance: 1.5%
Low profile Package: SOT-23-5
DESCRIPTION
PCS811/PCS812 are low-power microprocessor (µP)
supervisory circuits used to monitor power supplies in µP
and digital systems. They provide applications with
benefits of circuit reliability and low cost by eliminating
external components. PCS811/PCS812 also offer a
manual reset input.
These devices perform as valid singles in applications with
VCC ranging from 6.0V down to 0.9V. The reset signal
lasts for a minimum period of 140ms whenever VCC
supply voltage falls below preset threshold. Both PCS811
and PCS812 were designed with a reset comparator to
help identify invalid signals, which last less than 140ms.
The only difference between them is that they have an
active-low RESET output and active-high RESET output,
respectively.
Low supply current (1µA) makes PCS811/PCS812 ideal
APPLICATIONS
•
•
•
•
Notebook Computers
Digital Still Cameras
PDAs
Critical Microprocessor Monitoring
RESET THRESHOLD
Suffix
Voltage(V)
L
4.6
M
4.4
J
4.0
T
3.1
S
2.9
Q
2.7
R
2.6
P
2.3
for portable equipment. The devices are available in 5-
SOT-23 package
Typical Operating Circuit
VCC
VCC
PCS811
(PCS812)
RESET
(RESET)
MR
GND
VCC
µP
RESET
INPUT
GND
Pushbutton
Switch
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200 Campbell, CA 95008
•
Tel: 408-879-9077
•
Fax: 408-879-9018
www.pulsecoresemi.com
Notice: The information in this document is subject to change without notice.
January 2007
PCS811/PCS812
rev 0.1
Pin Diagram
GND
1
NC
2
RESET (RESET)
3
PCS811
(PCS812)
4
5
VCC
MR
Pin Description
Pin#
PCS811
1
2
PCS812
1
2
Pin Name
GND
NC
RESET
Ground.
No Connection
Description
RESET is asserted LOW if V
CC
falls below V
TH
. RESET remains LOW for atleast
140ms (T
RST
) once V
CC
exceeds the Threshold. In addition, RESET is active LOW
as long as the manual reset (MR) is low.
RESET is asserted HIGH if V
CC
falls below V
TH
. RESET remains HIGH for atleast
3
-
-
3
RESET
140ms (T
RST
) once V
CC
exceeds the threshold. In addition, RESET is active HIGH
as long as the manual reset (MR) is low.
Manual Reset Input. A logic LOW on MR asserts reset. Reset remains active as
long as MR is LOW and for at least 180ms (T
MRST
) once MR returns HIGH. The
active low input has an internal 20kΩ pull-up resistor. The input should be left
4
4
MR
open if not used. It can be driven by TTL or CMOS logic or shorted to ground by a
switch.
5
5
VCC
Power supply input voltage (3.0V, 3.3V, 5.0V)
Block Diagram
RESET (RESET)
RESET Generator
R1
R
PULL_UP
20K
R2
MR
GND
VCC
Bandgap
5-Pin
µP Voltage Supervisor with Manual Reset
Notice: The information in this document is subject to change without notice.
2 of 8
January 2007
PCS811/PCS812
rev 0.1
DETAIL DESCRIPTION
If a brownout condition occurs (VCC drops below the reset
RESET OUTPUT
µP
will be activated at a valid reset state. These
µP
supervisory circuits assert reset to prevent code execution
errors
during
power-up,
power-down,
or
brownout
conditions.
RESET is guaranteed to be a logic low for
V
TH
>VCC>0.9V. Once VCC exceeds the reset threshold,
an internal timer keeps RESET low for the reset timeout
period; after this interval, RESET goes high.
MANUAL RESET INPUT
Many
µP-based
products require manual reset capability,
allowing operators, test technicians, or external logic
circuitry to initiate a reset. Logic low on MR asserts reset.
Reset will remain asserted for the Reset Active Timeout
Period (t
RP
) after MR returns high. This input has an
internal 20KΩ pull-up resistor, so it can be floating if it is
not used. MR can be driven with TTL or CMOS-logic
levels, or with open-drain/collector outputs. Another
alternative is to connect a normal switch from MR to GND
to create a manual reset function. Connecting a 0.1µF
capacitor from MR to ground can provide noise immunity
BENEFITS
THRESHOLD
PCS811/812 with specified voltage as 5V±10% or
3V±10% are ideal for systems using a 5V±5% or 3V±5%
power supply. The reset is guaranteed to assert after the
power supply falls out of regulation, but before power
drops below the minimum specified operating voltage
range of the system ICs. The pre-trimmed thresholds are
reducing the range over which an undesirable reset may
occur.
OF
HIGHLY
ACCURATE
RESET
threshold), RESET goes low. Any time VCC goes below
the reset threshold, the internal timer resets to zero, and
RESET goes low. The internal timer is activated after VCC
returns above the reset threshold, and RESET remains
low for the reset timeout period.
The manual reset input (MR) can also initiate a reset.
PCS812 has an active-high RESET output that is the
inverse of PCS811’s RESET output.PCS811’s
RESET
output.
to prevent noise caused by long cables of MR or noisy
environment.
APPLICATION INFORMATION
NEGATIVE-GOING VCC TRANSIENTS
In addition to issuing a reset to the
µP
during power-up,
power-down, and brownout conditions, PCS811 series are
relatively resistant to short-duration negative-going VCC
transient.
ENSURING A VALID RESET OUTPUT DOWN TO
VCC=0
When VCC falls below 0.9V, PCS811 RESET output no
longer sinks current; it becomes an open circuit. In this
case, high-impedance CMOS logic inputs connecting to
RESET can drift to undetermined voltages. Therefore,
PCS811/812 with CMOS is perfect for most applications of
VCC below 0.9V. However in applications where RESET
must be valid down to 0V, adding a pull-down resistor to
RESET causes any leakage currents to flow to ground,
holding RESET low.
INTERFACING TO
µP
WITH BIDIRECTIONAL RESET
PINS
µPs
with bidirectional reset pins can contend with
PCS811/812 reset outputs. If PCS811 RESET output is
asserted high and the
µP
wants to pull it low,
indeterminate logic levels may occur. To correct such
cases, connect a resistor between PCS811 RESET (or
PCS812 RESET) output and the
µP
reset I/O. Buffer the
reset output to other system components.
5-Pin
µP Voltage Supervisor with Manual Reset
Notice: The information in this document is subject to change without notice.
3 of 8
January 2007
PCS811/PCS812
rev 0.1
Absolute Maximum Rating
Parameter
VCC
RESET,RESET
Input Current (VCC,MR)
Output Current (RESET or RESET)
Continuous Power Dissipation (T
A
=+70°C)
Operating Junction Temperature Range
Junction Temperature
Storage Temperature Range
Lead Temperature (Soldering) 10 sec
-65
-40
Min
0.3
0.3
Max
6.5
Vcc+0.3
20
20
320
+85
125
150
260
Unit
V
V
mA
mA
mW
°C
°C
°C
°C
Test Circuit
VCC
TEST CIRCUIT
VCC
0.1uF
RESET
(RESET)
MR
GND
Pushbutton
Switch
5-Pin
µP Voltage Supervisor with Manual Reset
Notice: The information in this document is subject to change without notice.
4 of 8
January 2007
PCS811/PCS812
rev 0.1
Electrical Characteristics:
(Typical valves are at T
A
=+25°C unless otherwise specified.) (Note1)
Parameter
Opreating Voltage
Supply Current
Symbol
VCC
I
CC
Test Conditions
Min
0.9
Typ
Max
6
Unit
V
VCC= V
TH
+0.1V
P device
R device
Q device
S device
T
A
=+25°C
T
A
-40°C to 85°C
T
A
=+25°C
T
A
-40°C to 85°C
T
A
=+25°C
T
A
-40°C to 85°C
T
A
=+25°C
T
A
-40°C to 85°C
T device
J device
M device
L device
T
A
=+25°C
T
A
-40°C to 85°C
T
A
=+25°C
T
A
-40°C to 85°C
T
A
=+25°C
T
A
-40°C to 85°C
T
A
=+25°C
T
A
-40°C to 85°C
2.265
2.254
2.561
2.548
2.660
2.646
2.857
2.842
3.054
3.038
3.940
3.920
4.334
4.312
4.531
4.508
1
2.3
2.6
2.7
2.9
3.1
4.0
4.4
4.6
20
140
100
0.5
0.7VCC
230
3
2.335
2.346
2.639
2.652
2.741
2.754
2.944
2.958
3.147
3.162
4.060
4.080
4.466
4.488
4.669
4.692
μA
RESET threshold
V
TH
V
VCC to Reset Delay
Reset Active Timeout Period
MR to Reset Progation delay
MR Input Threshold
MR Pull-up Resistance
RESET output Voltage
T
RD
T
RP
T
MD
V
IH
V
IL
VCC=V
TH
to (V
TH
-0.1V), V
TH
=3.1V
VCC=V
TH (
MAX)
VCC=6V
T
A
=+25°C
T
A
-40°C to 85°C
μS
560
1030
mS
μS
0.25VCC
V
kΩ
10
V
OH
V
OL
V
OH
V
OL
VCC = V
TH
+0.1V, I
SOURECE
=1mA
VCC= V
TH
-0.1V, I
SINK
=1mA
VCC = V
TH
+0.1V, I
SOURECE
=1mA
VCC= V
TH
-0.1V, I
SINK
=1mA
A
20
30
0.8VCC
0.2VCC
0.8VCC
0.2VCC
V
RESET output Voltage
Note1: Specifications are production tested at T =25°C. Specifications over the -40°C to 85°C operating temperature range are assured
by design, characterization and correlation with Statistical Quality Controls (SQC).
Note 2: RESET output is for PCS811: RESET output for PCS812
5-Pin
µP Voltage Supervisor with Manual Reset
Notice: The information in this document is subject to change without notice.
5 of 8
京公网安备 11010802033920号
EEWORLD
