29F68AQMX datasheet, PDF - EEWORLD Datasheet

29F68AQMX: DescriptionIC 256K X 1, DRAM CONTROLLER, PQCC52, PLASTIC, LCC-52, Memory Controller; CategoryThe embedded processor and controller Microcontrollers and processors; File Size277KB，11 Pages; ManufacturerNational Semiconductor（TI ）; Websitehttp://www.ti.com

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29F68AQMX Overview

IC 256K X 1, DRAM CONTROLLER, PQCC52, PLASTIC, LCC-52, Memory Controller

Parameter Name	Attribute value
package instruction	QCCJ,
Reach Compliance Code	unknow
ECCN code	3A001.A.2.C
Address bus width	20
boundary scan	NO
External data bus width
JESD-30 code	S-PQCC-J52
length	19.05 mm
low power mode	NO
memory organization	256K X 1
Number of blocks	4
Number of terminals	52
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Package shape	SQUARE
Package form	CHIP CARRIER
Certification status	Not Qualified
Maximum seat height	4.57 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	BIPOLAR
Temperature level	MILITARY
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
width	19.05 mm
uPs/uCs/peripheral integrated circuit type	MEMORY CONTROLLER, DRAM
Base Number Matches	1

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

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