VSC7127 datasheet, PDF - EEWORLD Datasheet

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VSC7127: DescriptionFamily of Repeater/Retimer and Port Bypass Circuits for Fibre Channel; File Size174KB，12 Pages; ManufacturerVitesse Semiconductor Corporation; Websitehttp://www.vitesse.com/

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VSC7127 Overview

Family of Repeater/Retimer and Port Bypass Circuits for Fibre Channel

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VITESSE

SEMICONDUCTOR CORPORATION

Data Sheet

VSC7127/VSC7129

Features

• ANSI X3T11 Fibre Channel Compliant

• 1.0625Gb/s Operation

• Features the FibreTimer

™

Configurable Clock

Recovery Unit (CRU): Repeater, Retimer or

Bypassed

• Six Port Bypass Circuits (PBC)

•

Family of Repeater/Retimer and Port

Bypass Circuits for Fibre Channel

Analog/Digital Signal Detect (SDU)

• On-Chip Transmit Termination

•

3.3V, 700mW Power Dissipation

• Compatible with HDMP-0451 (VSC7127) or

HDMP-0452 (VSC7129)

• 44-Pin, 10mm PQFP Package

General Description

The VSC7127 and VSC7129 contain six cascaded Port Bypass Circuits (PBCs), the FibreTimer

™

config-

urable Repeater/Retimer (CRU) and a Signal Detect Unit (SDU). These parts are typically used in distributing

Fibre Channel signals to an array of disk drives in an FC-AL loop as illustrated in Figure 1. The first

VSC7127’s CRU is configured as a Repeater to attenuate jitter, the second VSC7127’s CRU is bypassed to

reduce power and the third VSC7127’s CRU is configured as a retimer so that the output of the device is a jitter-

compliance point.

Each PBC is a multiplexer that is controlled by the corresponding SELx line which, if HIGH, selects the

external input or, if LOW, selects the output of the previous PBC. For the VSC712xR, when MODE is LOW

and SEL5 is HIGH, the CRU is a sophisticated repeater which has low latency, no peaking and attenuates jitter

even at low frequencies. When MODE is HIGH and SEL5 is HIGH, the CRU is a retimer which eliminates jit-

ter transfer but has increased latency due to an elasticity buffer which adds/drops Fibre Channel fill words in

order to accomodate the difference between the baud rate of the incoming data and the local REFCLK. When

SEL5 is LOW, the CRU is bypassed and powered down. The SDU monitors the analog levels of the IO+/- input

and monitors the output of the CRU digitally to indicate whether valid data is present.

The VSC7127/VSC7129 are similar to the VSC7124 which does not contain the FibreTimer

™

cell or CMU.

VSC7127/VSC7129 Block Diagram

O1+

O1-

I1+

I1-

SEL1

O2+

O2-

I2+

I2-

SEL2

O3+

O3-

I3+

I3-

SEL3

O4+

O4-

I4+

I4-

SEL4

O0+

O0-

I0+

I0-

SEL0

REFCLK

106.25MHz

CMU

0.1uF

PBC1

SEL5

PBC2

PBC3

PBC4

PBC0

PBC5

CRU

MODE

SDU

SIGDET

G52298-0, Rev 4.3

05/01/01

VITESSE

SEMICONDUCTOR CORPORATION

• 741 Calle Plano • Camarillo, CA 93012

Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com

Internet: www.vitesse.com

Page 1

VITESSE

SEMICONDUCTOR CORPORATION

Data Sheet

VSC7127/VSC7129

Functionality

Family of Repeater/Retimer and Port

Bypass Circuits for Fibre Channel

Device Configurations

Four devices are specified in this datasheet: VSC7127R, VSC7127T, VSC7129R and VSC7129T. The

VSC7127 is pin-compatible to the HDMP-0451. The VSC7129 is pin compatible with the HDMP-0452. The

VSC712xR is configured as a Repeater when pin 12, MODE, is LOW, or a Retimer when HIGH. The

VSC712xT is configured as a Retimer when pin 12, MODE, is LOW, or a Repeater when HIGH.

Port Bypass Circuits

The VSC712x contains six Port Bypass Circuits (PBCs) which are 2-to-1 multiplexers used to steer serial

signals. Each PBC, PBCx has a single select line, SELx, which when HIGH, selects the external input, Ix, to

PBCx and when LOW, selects the output of the previous PBC. PCB5 does not have an external input but selects

between the output of the CRU (when SEL5 is HIGH) and the output of PBC0 (when SEL5 is LOW). These

controls allow FC-AL loops to include a functional device on the loop or exclude a non-functional device from

the loop.

FibreTimer

™

Clock Recovery Unit—Repeater Mode

The Clock Recovery Unit (CRU) is a digital PLL which extracts the clock from the incoming data and sam-

ples the data with the extracted clock. In repeater mode, the output of the CRU is synchronized to the recovered

clock and has improved signal quality due to amplification of the signal and attenuation of jitter. Latency

through the device is quite low, just a few bit times. Multiple repeaters can be cascaded without accumulation

of jitter. MODE determines whether the CRU is a Repeater or a Retimer.

FibreTimer

™

Clock Recovery Unit —Retimer Mode

MODE may configure the CRU as a retimer where the recovered data is placed into an elasticity buffer.

Data is taken out of the elasticity buffer and retransmitted synchronously to the local REFCLK. For Fibre Chan-

nel data, Fill words will be added and dropped in the elasticity buffer in order to accomodate the differences in

speed between the incoming data and the REFCLK. The retimer does not transfer jitter from the input to the

output but has longer latency, up to 4 word times, through the device.

FibreTimer

™

Clock Recovery Unit—Bypass Mode

When SEL5 is LOW, PBC5 selects the output of PBC0 and the CRU is unused. In this mode, the CRU is

powered down to reduce power dissipation. If the part will be used only in this mode, REFCLK and MODE are

ignored and can be left open. If the CRU is bypassed, the Signal Detect Unit is disabled and the output is LOW.

Signal Detection

A signal detect unit (SDU) monitors IO+/- and the output of the CRU to determine if there is a valid Fibre

Channel signal present. The SIGDET is updated every 160 bits (an “interval”) with the previous interval’s status

of three different Signal Detect Units: analog signal amplitude (ASDU), run length check (RLLSDU), Ordered

Set density (OSSDU). If the input amplitude is less than 200mV (differential), ASDU will be set LOW. If the

input amplitude is greater than 400mV, ASDU will be asserted HIGH. If a run length violation occurs (more

than 5 consecutive ones or zeros), the RLLSDU will be set LOW and stay LOW until the occurrence of a valid

G52298-0, Rev 4.3

05/01/01

VITESSE

SEMICONDUCTOR CORPORATION

• 741 Calle Plano • Camarillo, CA 93012

Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com

Internet: www.vitesse.com

Page 3

VSC7127 Related Products

	VSC7127	VSC7129R	VSC7129T	VSC7129	VSC7127TQM	VSC7127T	VSC7127R
Description	Family of Repeater/Retimer and Port Bypass Circuits for Fibre Channel	Family of Repeater/Retimer and Port Bypass Circuits for Fibre Channel	Family of Repeater/Retimer and Port Bypass Circuits for Fibre Channel	Family of Repeater/Retimer and Port Bypass Circuits for Fibre Channel	Family of Repeater/Retimer and Port Bypass Circuits for Fibre Channel	Family of Repeater/Retimer and Port Bypass Circuits for Fibre Channel	Family of Repeater/Retimer and Port Bypass Circuits for Fibre Channel

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