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VSC7122QM

Description
Quad Port Bypass Circuit for 1.0625 Gbit/sec Fibre Channel Arbitrated Loop Disk Arrays
CategoryWireless rf/communication    Telecom circuit   
File Size65KB,12 Pages
ManufacturerVitesse Semiconductor Corporation
Websitehttp://www.vitesse.com/
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VSC7122QM Overview

Quad Port Bypass Circuit for 1.0625 Gbit/sec Fibre Channel Arbitrated Loop Disk Arrays

VSC7122QM Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerVitesse Semiconductor Corporation
Parts packaging codeQFP
package instructionQFP, QFP44,.5SQ,32
Contacts44
Reach Compliance Codeunknow
JESD-30 codeS-PQFP-G44
JESD-609 codee0
length10 mm
Number of functions1
Number of terminals44
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeQFP
Encapsulate equivalent codeQFP44,.5SQ,32
Package shapeSQUARE
Package formFLATPACK
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply3.3 V
Certification statusNot Qualified
Maximum seat height2.35 mm
Maximum slew rate0.15 mA
Nominal supply voltage3.3 V
surface mountYES
technologyGAAS
Telecom integrated circuit typesTELECOM CIRCUIT
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width10 mm
VITESSE
SEMICONDUCTOR CORPORATION
Advance Product Information
VSC7122
Features
• Supports ANSI X3T11 1.0625 Gbit/sec
FC-AL Disk Attach for Resiliency
• Fully Differential for Minimum
Jitter Accumulation.
• Quad PBC’s in Single Package
Quad Port Bypass Circuit for 1.0625 Gbit/sec
Fibre Channel Arbitrated Loop Disk Arrays
• TTL Bypass Select
• High Speed, PECL I/O’s Referenced to V
DD
.
• 0.35W Typical Power Dissipation
• 3.3V Power Supply
• 44-Pin, 10mm PQFP
General Description
The VSC7122 is a Quad Port Bypass Circuit (PBC). Four Fibre Channel PBC’s are cascaded into a single
part to minimize part count, cost, high frequency routing, and jitter accumulation. Port Bypass Circuits are used
to provide resiliency in Fibre Channel Arbitrated Loop (FC-AL) architectures. PBC’s are used within FC-AL
disk arrays to allow for resiliency and hot swapping of FC-AL drives.
A Port Bypass Circuit is a 2:1 Multiplexer with two modes of operation: NORMAL and BYPASS. In NOR-
MAL mode, the disk drive is connected to the loop. Data goes from the 7122’s L_SOn pin to the Disk Drive RX
input and data from the disk drive TX output goes to the 7122’s L_SIn pin. Refer to Figure 2 for disk drive
application. In BYPASS mode, the disk drive is either absent or non-functional and data bypasses to the next
available disk drive. Normal mode is enabled with a HIGH on the SEL pin and BYPASS mode is enabled by a
LOW on the SEL pin. Direct Attach Fibre Channel Disk Drives have an “LRC Interlock” signal defined to con-
trol the SEL function.
Using a VSC7122 in a single loop of a disk array is illustrated in Figure 2: “Disk Array Application”. FC-
AL drives are all expected to be dual loop. The VSC7122 is cascaded in a manner such that all the 7122’s inter-
nal PBC’s are used in the same loop. For dual loop implementations, two or more VSC7122’s should be used.
Allocating each VSC7122 to only one of two loops preserves redundancy, prevents a single point of failure and
lends itself to on-line maintainability.
The VSC7122 is very similar to the VSC7121 except that LSO+ outputs are all full power outputs identical
to OUT. This is useful in passive backplanes to provide additional amplitude on long traces.
7122 Block Diagram
LSO1+
LSO1-
LSO2+
LSO2-
LSO3+
LSO3-
LSO4+
LSO4-
LSI1+
LSI1-
LSI2+
LSI2-
LSI3+
LSI3-
LSI4+
LSI4-
SEL1
SEL2
SEL3
SEL4
1
0
OUT+
OUT-
1
IN+
IN-
0
1
0
1
0
PBC1
PBC2
PBC3
PBC4
G52155-0, Rev. 2.1
8/31/98
©
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
Page 1

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