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W24257ACQ-12

Description
Standard SRAM, 32KX8, 12ns, CMOS, PDSO28, 8 X 13.40 MM, TSOP1-28
Categorystorage    storage   
File Size149KB,10 Pages
ManufacturerWinbond Electronics Corporation
Websitehttp://www.winbond.com.tw
Download Datasheet Parametric View All

W24257ACQ-12 Overview

Standard SRAM, 32KX8, 12ns, CMOS, PDSO28, 8 X 13.40 MM, TSOP1-28

W24257ACQ-12 Parametric

Parameter NameAttribute value
MakerWinbond Electronics Corporation
Parts packaging codeTSOP
package instructionTSOP1,
Contacts28
Reach Compliance Codeunknown
ECCN codeEAR99
Maximum access time12 ns
JESD-30 codeR-PDSO-G28
length11.8 mm
memory density262144 bit
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of terminals28
word count32768 words
character code32000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize32KX8
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP1
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formGULL WING
Terminal pitch0.55 mm
Terminal locationDUAL
width8 mm

W24257ACQ-12 Preview

W24257AC
32K
×
8 HIGH SPEED CMOS STATIC RAM
GENERAL DESCRIPTION
The W24257AC is a high speed, low power CMOS static RAM organized as 32768
×
8 bits that
operates on a single 5-volt power supply. This device is manufactured using Winbond's high
performance CMOS technology.
FEATURES
High speed access time: 10/12/15/20 nS (max.)
Low power consumption:
Active: 400 mW (typ.)
Single
+5V
power supply
Fully static operation
All inputs and outputs directly TTL compatible
Three-state outputs
Available packages: 28-pin 300 mil SOJ, 330
mil SOP, skinny DIP and standard type one
TSOP (8 mm
×
13.4 mm)
PIN CONFIGURATIONS
BLOCK DIAGRAM
V
DD
V
SS
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28-pin
DIP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
DD
WE
A13
A8
A9
A11
OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
A0
.
.
A14
DECODER
CORE
ARRAY
CS
OE
WE
CONTROL
DATA I/O
I/O1
.
.
I/O8
PIN DESCRIPTION
SYMBOL
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Select Input
Write Enable Input
Output Enable Input
Power Supply
Ground
A0−A14
I/O1−I/O8
CS
WE
OE
V
DD
V
SS
OE
A11
A9
A8
A13
WE
V
DD
A14
A12
A7
A6
A5
A4
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28-pin
TSOP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
V
SS
I/O3
I/O2
I/O1
A0
A1
A2
-1-
Publication Release Date: October 1998
Revision A1
W24257AC
DC CHARACTERISTICS
Absolute Maximum Ratings
PARAMETER
Supply Voltage to V
SS
Potential
Input/Output to V
SS
Potential
Allowable Power Dissipation
Storage Temperature
Operating Temperature
RATING
-0.5 to +7.0
-0.5 to V
DD
+0.5
1.0
-65 to +150
0 to +70
UNIT
V
V
W
°C
°C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the
device.
TRUTH TABLE
CS
H
L
L
L
OE
X
H
L
X
WE
X
H
H
L
MODE
Not Selected
Output Disable
Read
Write
I/O1−I/O8
High Z
High Z
Data Out
Data In
V
DD
CURRENT
I
SB
, I
SB
1
I
DD
I
DD
I
DD
OPERATING CHARACTERISTICS
(V
DD
= 5V
±10%,
V
SS
= 0V, T
A
= 0 to 70° C)
PARAMETER
Input Low Voltage
Input High Voltage
Input Leakage Current
Output Leakage
Current
Output Low Voltage
Output High Voltage
Operating Power
Supply Current
SYM.
V
IL
V
IH
I
LI
I
LO
V
OL
V
OH
I
DD
TEST CONDITIONS
-
-
V
IN
= V
SS
to V
DD
V
I/O
= V
SS
to V
DD,
CS = V
IH
or OE = V
IH
or WE = V
IL
I
OL
= +8.0 mA
I
OH
= -4.0 mA
CS = V
IL,
I/O = 0 mA
Cycle = MIN.
Duty = 100%
10
12
15
20
MIN.
-0.5
+2.2
-10
-10
-
2.4
-
-
-
-
-
TYP.
-
-
-
-
-
-
-
-
-
-
-
MAX.
+0.8
V
DD
+0.5
+10
+10
0.4
-
170
160
150
140
30
10
UNIT
V
V
µA
µA
V
V
mA
mA
mA
mA
mA
mA
Standby Power
Supply Current
I
SB
I
SB
1
CS = V
IH
Cycle = MIN., Duty = 100%
CS
V
DD
-0.2V
Note: Typical characteristics are at V
DD
= 5V, T
A
= 25° C.
-2-
W24257AC
CAPACITANCE
(V
DD
= 5V, T
A
= 25° C, f = 1 MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYM.
C
IN
C
I/O
CONDITIONS
V
IN
= 0V
V
OUT
= 0V
MAX.
8
10
UNIT
pF
pF
Note: These parameters are sampled but not 100% tested.
AC TEST CONDITIONS
PARAMETER
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Level
Output Load
0V to 3V
5 nS
1.5V
C
L
= 30 pF, I
OH
/I
OL
= -4 mA/8 mA
CONDITIONS
AC TEST LOADS AND WAVEFORM
R1 480 ohm
R1 480 ohm
5V
OUTPUT
30 pF
Including
Jig and
Scope
R2
255 ohm
5V
OUTPUT
5 pF
Including
Jig and
Scope
R2
255 ohm
(For T
CLZ
, T
OLZ
, T
CHZ
, T
OHZ
, T
WHZ
, T
OW
)
3.0V
90%
10%
5 nS
90%
10%
5 nS
0V
-3-
Publication Release Date: October 1998
Revision A1
W24257AC
AC CHARACTERISTICS
(V
DD
= 5V
±10%,
V
SS
= 0V, T
A
= 0 to 70° C)
Read Cycle
PARAMETER
SYM.
W24257AC-10
MIN.
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Enable to Output Valid
Chip Selection to Output in Low Z
Output Enable to Output in Low Z
Chip Deselection to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
T
RC
T
AA
T
ACS
T
AOE
T
CLZ
T
OLZ
T
CHZ
T
OHZ
T
OH
10
-
-
-
3
0
-
-
3
MAX.
-
10
10
5
-
-
5
5
-
W24257AC-12
MIN.
12
-
-
-
3
0
-
-
3
MAX.
-
12
12
6
-
-
6
6
-
W24257AC-15
MIN.
15
-
-
-
3
0
-
-
3
MAX.
-
15
15
7
-
-
7
7
-
W24257AC-20
MIN.
20
-
-
-
3
0
-
-
3
MAX.
-
20
20
10
-
-
10
10
-
nS
nS
nS
nS
nS
nS
nS
nS
nS
UNIT
These parameters are sampled but not 100% tested.
Write Cycle
PARAMETER
SYM.
W24257AC-10
MIN.
Write Cycle Time
Chip Selection to End of Write
Address Valid to End of Write
Address Setup Time
Write Pulse Width
Write Recovery Time
Data Valid to End of Write
Data Hold from End of Write
Write to Output in High Z
Output Disable to Output in High Z
Output Active from End of Write
CS , WE
T
WC
T
CW
T
AW
T
AS
T
WP
T
WR
T
DW
T
DH
T
WHZ
T
OHZ
T
OW
10
9
9
0
9
0
6
0
-
-
0
MAX.
-
-
-
-
-
-
-
-
6
6
-
W24257AC-12
MIN.
12
10
10
0
10
0
7
0
-
-
0
MAX.
-
-
-
-
-
-
-
-
7
7
-
W24257AC-15
MIN.
15
13
13
0
10
0
9
0
-
-
0
MAX.
-
-
-
-
-
-
-
-
8
8
-
W24257AC-20
MIN.
20
17
17
0
12
0
10
0
-
-
0
MAX.
-
-
-
-
-
-
-
-
10
10
-
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
UNIT
These parameters are sampled but not 100% tested.
-4-
W24257AC
TIMING WAVEFORMS
Read Cycle 1
(Address Controlled)
T
RC
Address
T
OH
D
OUT
T
AA
T
OH
Read Cycle 2
(Chip Select Controlled)
CS
T
ACS
D
OUT
T
CLZ
T
CHZ
Read Cycle 3
(Output Enable Controlled)
T
RC
Address
T
AA
OE
T
AOE
T
OLZ
CS
T
ACS
D
OUT
T
CLZ
T
CHZ
T
OHZ
T
OH
-5-
Publication Release Date: October 1998
Revision A1

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