AP101C183KQZ4A datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Passive components> capacitor> AP101C183KQZ4A

AP101C183KQZ4A: DescriptionCeramic Capacitor, Multilayer, Ceramic, 100V, 10% +Tol, 10% -Tol, X7R, 15% TC, 0.018uF, Surface Mount, 1210, CHIP, ROHS COMPLIANT; CategoryPassive components capacitor; File Size145KB，3 Pages; ManufacturerAVX; Environmental Compliance

Download Datasheet Parametric View All

AP101C183KQZ4A Overview

Ceramic Capacitor, Multilayer, Ceramic, 100V, 10% +Tol, 10% -Tol, X7R, 15% TC, 0.018uF, Surface Mount, 1210, CHIP, ROHS COMPLIANT

AP101C183KQZ4A Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	AVX
package instruction	CHIP
Reach Compliance Code	compliant
ECCN code	EAR99
capacitance	0.018 µF
Capacitor type	CERAMIC CAPACITOR
dielectric materials	CERAMIC
high	1.02 mm
JESD-609 code	e2
Installation features	SURFACE MOUNT
multi-layer	Yes
negative tolerance	10%
Number of terminals	2
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package shape	RECTANGULAR PACKAGE
Package form	SMT
method of packing	TR, EMBOSSED, 13 INCH
positive tolerance	10%
Rated (DC) voltage (URdc)	100 V
size code	1210
surface mount	YES
Temperature characteristic code	X7R
Temperature Coefficient	15% ppm/°C
Terminal surface	Tin/Nickel (Sn/Ni)
Terminal shape	WRAPAROUND

Preview

Download Datasheet

View All

APS Series

APS for COTS+ Applications

GENERAL DESCRIPTION

As part of our continuing support to high reliability customers, AVX

has launched an Automotive Plus Series of parts (APS) qualified and manufactured

in accordance with automotive AEC-Q200 standard. Each production batch is qual-

ity tested to an enhanced requirement and shipped with a certificate of conformance.

On a quarterly basis a reliability package is issued to all APS customers.

A detailed qualification package is available on request and contains results on a

range of part numbers including:

• X7R dielectric components containing BME electrode and copper terminations

with a Ni/Sn plated overcoat.

• X7R dielectric components BME electrode and soft terminations with a Ni/Sn

plated overcoat (FLEXITERM

• X7R for Hybrid applications.

• NP0 dielectric components containing Pd/Ag electrode and silver termination with

a Ni/Sn plated overcoat.

We are also able to support customers who require an AEC-Q200 grade component

finished with Tin/Lead.

HOW TO ORDER

AP03

Size

AP03=0603

AP05=0805

AP06=1206

AP10=1210

AP12=1812

Voltage

16V = Y

25V = 3

50V = 5

100V = 1

200V = 2

500V = 7

Dielectric

NP0 = A

X7R = C

104

Capacitance

Code (In pF)

2 Significant Digits +

Number of Zeros

e.g. 10μF = 106

Capacitance

Tolerance

J = ±5%

K = ±10%

M = ±20%

Special Code

A = Std. Product

Failure Rate

Packaging

Terminations

Q = APS

T = Plated Ni and Sn** 2 = 7" Reel

4 = 13" Reel

Z = FLEXITERM

U = Conductive Epoxy**

B = 5% min lead

X = FLEXITERM

with

5% min lead

Z, U, X for X7R only

**RoHS compliant

NOTE: Contact factory for availability of Termination and Tolerance Options for Specific Part Numbers.

Recommended Resources

Circuit diagram using a single probe to test cable breaks

Internal structure of RT9245 chip

High voltage delay circuit diagram

Otto QB4 soft starter complete equipment

Jingyi ZGK-63L dual-function electronic disinfection cabinet circuit diagram

800Kbit-s optical fiber data photoelectric receiver circuit

SPEC Downloads: Can anyone please tell me if there is any component SPEC download?...; ZHANGZUHE Integrated technical exchanges

I met the dcexpert moderator in Shenzhen today: Today I met the moderator of dcexpert at the Smart Wearable Device Application Summit:loveliness::loveliness:, a very nice person:lol:lol, I have been traveling in Shenzhen for most of the day today, ...; 强仔00001 DIY/Open Source Hardware

The upper limit for each mobile phone is US$2.5. How much 5G patent fees can Huawei collect?: On March 16, Huawei released the "Huawei Innovation and Intellectual Property White Paper 2020" in Shenzhen, launched the Huawei Patent Digital Wall, and announced its 5G patent licensing rate standar...; eric_wang Talking

How does FPGA prevent theft?: What are some tricks for FPGA encryption? Ask an expert!...; eeleader FPGA/CPLD

WNS TNS problem in Vivado: I would like to ask about WNS and TNS in Vivado. Why does the report after my design generates the bitstream show that WNS is less than 0, but the function is still correct after downloading the board...; 成谶 FPGA/CPLD

Fabrication of a proportional frequency discriminator: I changed the phase discriminator to the proportional discriminator directly, and the parameters did not change. Why is the output not the modulation signal but the carrier signal? Thank you...; ckx提问 Analog electronics

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components