MT5C2565DJ-25P datasheet, PDF - EEWORLD Datasheet

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MT5C2565DJ-25P: DescriptionStandard SRAM, 64KX4, 25ns, CMOS, PDSO28, 0.300 INCH, PLASTIC, SOJ-28; Categorystorage storage; File Size143KB，12 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/

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MT5C2565DJ-25P Overview

Standard SRAM, 64KX4, 25ns, CMOS, PDSO28, 0.300 INCH, PLASTIC, SOJ-28

MT5C2565DJ-25P Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Micron Technology
Parts packaging code	SOJ
package instruction	0.300 INCH, PLASTIC, SOJ-28
Contacts	28
Reach Compliance Code	not_compliant
ECCN code	EAR99
Maximum access time	25 ns
I/O type	COMMON
JESD-30 code	R-PDSO-J28
JESD-609 code	e0
length	18.44 mm
memory density	262144 bit
Memory IC Type	STANDARD SRAM
memory width	4
Number of functions	1
Number of ports	1
Number of terminals	28
word count	65536 words
character code	64000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	64KX4
Output characteristics	3-STATE
Exportable	YES
Package body material	PLASTIC/EPOXY
encapsulated code	SOJ
Encapsulate equivalent code	SOJ28,.34
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
Maximum seat height	3.68 mm
Maximum standby current	0.003 A
Minimum standby current	4.5 V
Maximum slew rate	0.14 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.67 mm

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OBSOLETE 3/1/95

MT5C2565

64K x 4 SRAM

SRAM

FEATURES

• High speed: 10, 12, 15, 20 and 25

• High-performance, low-power, CMOS double-metal

process

• Single +5V

±10%

power supply

• Easy memory expansion with

E and

E options

• All inputs and outputs are TTL-compatible

64K x 4 SRAM

WITH OUTPUT ENABLE

PIN ASSIGNMENT (Top View)

28-Pin SOJ

(SD-2)

Vss

Vcc

A15

A14

A13

A12

A11

A10

DQ4

DQ3

DQ2

DQ1

28-Pin DIP

(SA-4)

Vcc

A15

A14

A13

A12

A11

A10

DQ4

DQ3

DQ2

DQ1

OPTIONS

• Timing

10ns access

12ns access

15ns access

20ns access

25ns access

• Packages

Plastic DIP (300 mil)

Plastic SOJ (300 mil)

• 2V data retention (optional)

• Low power (optional)

MARKING

-10

-12

-15

-20

-25

None

• Temperature

Commercial (0°C to +70°C)

Industrial

(-40°C to +85°C)

Automotive (-40°C to +125°C)

Extended

(-55°C to +125°C)

Vss

• Part Number Example: MT5C2565DJ-15 L

NOTE: Not all combinations of operating temperature, speed, data retention

and low power are necessarily available. Please contact the factory for availabil-

ity of specific part number combinations.

GENERAL DESCRIPTION

The MT5C2565 is organized as a 65,536 x 4 SRAM using

a four-transistor memory cell with a high-speed, low-power

CMOS process. Micron SRAMs are fabricated using double-

layer metal, double-layer polysilicon technology.

For flexibility in high-speed memory applications,

Micron offers chip enable (?C

E) and output enable (?O

E) with

this organization. These enhancements can place the out-

puts in High-Z for additional flexibility in system design.

Writing to these devices is accomplished when write

enable (?W

E) and

E inputs are both LOW. Reading is

accomplished when

E remains HIGH and

E and

OE go

LOW. The device offers a reduced power standby mode

MT5C2565

Rev. 11/94

when disabled. This allows system designers to meet low

standby power requirements.

The “P” version provides a reduction in both operating

current (I

) and TTL standby current (I

). The latter is

achieved through the use of gated inputs on the

E and

address lines, which also facilitates the design of battery

backed systems. That is, the gated inputs simplify the

design effort and circuitry required to protect against inad-

vertent battery current drain during power-down, when

inputs may be at undefined levels.

All devices operate from a single +5V power supply and

all inputs and outputs are fully TTL-compatible.

Micron Semiconductor, Inc., reserves the right to change products or specifications without notice.

Micron Semiconductor, Inc.

MT5C2565DJ-25P Related Products

	MT5C2565DJ-25P	MT5C2565-20P	MT5C2565-15P	MT5C2565DJ-15P	MT5C2565DJ-20P
Description	Standard SRAM, 64KX4, 25ns, CMOS, PDSO28, 0.300 INCH, PLASTIC, SOJ-28	Standard SRAM, 64KX4, 20ns, CMOS, PDIP28, 0.300 INCH, PLASTIC, DIP-28	Standard SRAM, 64KX4, 15ns, CMOS, PDIP28, 0.300 INCH, PLASTIC, DIP-28	Standard SRAM, 64KX4, 15ns, CMOS, PDSO28, 0.300 INCH, PLASTIC, SOJ-28	Standard SRAM, 64KX4, 20ns, CMOS, PDSO28, 0.300 INCH, PLASTIC, SOJ-28
Is it lead-free?	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible
Maker	Micron Technology	Micron Technology	Micron Technology	Micron Technology	Micron Technology
Parts packaging code	SOJ	DIP	DIP	SOJ	SOJ
package instruction	0.300 INCH, PLASTIC, SOJ-28	0.300 INCH, PLASTIC, DIP-28	0.300 INCH, PLASTIC, DIP-28	0.300 INCH, PLASTIC, SOJ-28	0.300 INCH, PLASTIC, SOJ-28
Contacts	28	28	28	28	28
Reach Compliance Code	not_compliant	not_compliant	unknown	not_compliant	not_compliant
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99
Maximum access time	25 ns	20 ns	15 ns	15 ns	20 ns
I/O type	COMMON	COMMON	COMMON	COMMON	COMMON
JESD-30 code	R-PDSO-J28	R-PDIP-T28	R-PDIP-T28	R-PDSO-J28	R-PDSO-J28
JESD-609 code	e0	e0	e0	e0	e0
length	18.44 mm	36.83 mm	36.83 mm	18.44 mm	18.44 mm
memory density	262144 bit	262144 bit	262144 bit	262144 bit	262144 bit
Memory IC Type	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM	STANDARD SRAM
memory width	4	4	4	4	4
Number of functions	1	1	1	1	1
Number of ports	1	1	1	1	1
Number of terminals	28	28	28	28	28
word count	65536 words	65536 words	65536 words	65536 words	65536 words
character code	64000	64000	64000	64000	64000
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C
organize	64KX4	64KX4	64KX4	64KX4	64KX4
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Exportable	YES	YES	YES	YES	YES
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOJ	DIP	DIP	SOJ	SOJ
Encapsulate equivalent code	SOJ28,.34	DIP28,.3	DIP28,.3	SOJ28,.34	SOJ28,.34
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	IN-LINE	IN-LINE	SMALL OUTLINE	SMALL OUTLINE
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	235	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	5 V	5 V	5 V	5 V	5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	3.68 mm	4.32 mm	4.32 mm	3.68 mm	3.68 mm
Maximum standby current	0.003 A	0.003 A	0.003 A	0.003 A	0.003 A
Minimum standby current	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Maximum slew rate	0.14 mA	0.15 mA	0.165 mA	0.165 mA	0.15 mA
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V
surface mount	YES	NO	NO	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	J BEND	THROUGH-HOLE	THROUGH-HOLE	J BEND	J BEND
Terminal pitch	1.27 mm	2.54 mm	2.54 mm	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	30	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	7.67 mm	7.62 mm	7.62 mm	7.67 mm	7.67 mm

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