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M908-01I156.2500LF

Description
Clock Generator, 156.25MHz, CQCC36, 9 X 9 MM, CERAMIC, LCC-36
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size293KB,6 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance  
Download Datasheet Parametric View All

M908-01I156.2500LF Overview

Clock Generator, 156.25MHz, CQCC36, 9 X 9 MM, CERAMIC, LCC-36

M908-01I156.2500LF Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeLCC
package instructionQCCN,
Contacts36
Reach Compliance Codecompliant
ECCN codeEAR99
JESD-30 codeS-CQCC-N36
JESD-609 codee3
length8.99 mm
Number of terminals36
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Maximum output clock frequency156.25 MHz
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeQCCN
Package shapeSQUARE
Package formCHIP CARRIER
Peak Reflow Temperature (Celsius)260
Master clock/crystal nominal frequency25 MHz
Certification statusNot Qualified
Maximum seat height3.1 mm
Maximum supply voltage3.465 V
Minimum supply voltage3.135 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMATTE TIN
Terminal formNO LEAD
Terminal pitch0.635 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width8.99 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, OTHER
Integrated
Circuit
Systems, Inc.
Product Data Sheet
M908-01
VCSO B
ASED
G
B
E C
LOCK
G
ENERATOR
P
IN
A
SSIGNMENT
(9 x 9 mm SMT)
XTAL_1 / REF_IN
GND
nFOUT5
FOUT5
nFOUT4
FOUT4
nFOUT3
FOUT3
VCC
XTAL_2
FOUT6
nFOUT6
FOUT7
nFOUT7
VCC
DNC
DNC
DNC
27
26
25
24
23
22
21
20
19
G
ENERAL
D
ESCRIPTION
The M908-01 is a PLL (Phase Locked Loop) based
clock generator that uses an
internal VCSO (Voltage Controlled
SAW Oscillator) to produce a very
low jitter output clock. It is ideal for
Gigabit Ethernet. The output clock
(frequency of
156.25
or
187.50
MHz
for example) is provided from eight
LVPECL clock output pairs. (Specify frequency at time
of order.) The accuracy of the output frequency is
assured by the internal PLL, which phase-locks the
internal VCSO to the reference input frequency (
25
or
30
MHz for example). The input reference can either
be an external crystal, utilizing the internal crystal
oscillator, or a stable external clock source such as
a packaged crystal oscillator.
28
29
30
31
32
33
34
35
36
M908-01
(Top View)
18
17
16
15
14
13
12
11
10
nFOUT2
FOUT2
nFOUT1
FOUT1
GND
nFOUT0
FOUT0
VCC
GND
F
EATURES
Output clock frequency from 125MHz to 190MHz
(Consult factory for frequency availability)
Eight identical LVPECL output pairs
Integrated SAW (surface acoustic wave) delay line
Low jitter 0.7ps RMS (over 12kHz-20MHz)
Ideal for Gigabit Ethernet clock reference
Output-to-output skew < 100ps
External XTAL or LVCMOS reference input
Industrial temperature grade available
Single 3.3V power supply
Small 9 x 9 mm SMT (surface mount) package
Figure 1: Pin Assignment
Example Output Frequency Configurations
Ref Clock
Frequency
(MHz)
20
25
30
25/4
PLL
Ratio
Output
Frequency
1
(MHz)
125.00
156.25
187.50
Application
GND
GND
GND
OP_IN
nOP_OUT
nVC
VC
OP_OUT
nOP_IN
1
2
3
4
5
6
7
8
9
GbE
10GbE
12GbE
Table 1: Example Output Frequency Configurations
Note 1:Specify output clock frequency at time of order
S
IMPLIFIED
B
LOCK
D
IAGRAM
M908-01
FOUT7
nFOUT7
VSCO
FOUT6
nFOUT6
FOUT5
nFOUT5
External
Crystal
or
Reference
Clock Input
(e.g., 25 or 30 MHz)
XTAL
OSC
Divider
Frequency
Multiplying
PLL
FOUT4
nFOUT4
FOUT3
nFOUT3
FOUT2
nFOUT2
FOUT1
nFOUT1
FOUT0
nFOUT0
LVPECL
Output
Clock Pairs
(e.g., 156.25
or 187.50MHz)
External Loop Filter
Figure 2: Simplified Block Diagram
M908-01 Datasheet Rev 2.1
M908-01 VCSO Based GbE Clock Generator
Revised 30Jul2004
Integrated Circuit Systems, Inc.
Communications Modules
w w w. i c s t . c o m
tel (508) 852-5400
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