DATASHEET
3.3 VOLT ZERO DELAY LOW SKEW BUFFER
Description
The ICS2309 is a low phase noise, high-speed PLL
based, low-skew zero delay buffer. Based on ICS’
proprietary low jitter Phase Locked Loop (PLL)
techniques, the device provides nine low skew outputs
at speeds up to 133 MHz at 3.3 V. The outputs can be
generated from the PLL (for zero delay), or directly from
the input (for testing), and can be set to tri-state mode
or to stop at a low level. The PLL feedback is on-chip
and is obtained from the CLKOUT pad.
The ICS2309 is available in two different versions. The
ICS2309-1 is the base part. The ICS2309-1H is a high
drive version with faster rise and fall times.
ICS2309
Features
•
•
•
•
•
•
•
•
•
•
•
Clock outputs from 10 to 133 MHz
Zero input-output delay
Nine low skew (<250 ps) outputs
Device-to-device skew <700 ps
Full CMOS outputs with 12 mA output drive
capability at TTL levels
5 V tolerant CLKIN
Tri-state mode for board-level testing
Advanced, low power, sub-micron CMOS process
Operating voltage of 3.3 V
Industrial temperature range available
Packaged in 16-pin SOIC and TSSOP (-1H version
only)
complaint packaging
•
RoHS 5 (green) or RoHS 6 (green and lead free)
Block Diagram
VDD
2
CLKIN
PLL
0
CLKOUT
1
CLKA1
CLKA2
CLKA3
CLKA4
S2, S1 2
Control
Logic
CLKB1
CLKB2
CLKB3
CLKB4
GND
2
IDT™ / ICS™
3.3 VOLT ZERO DELAY LOW SKEW BUFFER
1
ICS2309
REV F 041906
ICS2309
3.3 VOLT ZERO DELAY LOW SKEW BUFFER
ZERO DELAY BUFFERS
Pin Assignment
CLKIN
CLKA1
CLKA2
VDD
GND
CLKB1
CLKB2
S2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CLKOUT
CLKA4
CLKA3
VDD
GND
CLKB4
CLKB3
S1
16 pin narrow (150 mil) SOIC
Output Clock Mode Select Table
S2
0
0
1
1
S1
0
1
0
1
CLKA1:A4
Tri-state (note 1)
Running
Running
Running
CLKB1:B4
Tri-state (note 1)
Tri-state (note 1)
Running
Running
A & B Source
PLL
PLL
CLKIN (note 2)
PLL
CLKOUT
Driven
Driven
PLL Bypass Mode
Driven
PLL Status
OFF
ON
OFF
ON
Note 1. Outputs are in high impedance state
Note 2. Buffer mode only; not zero delay between input and output
Pin Descriptions
Pin
Number
1
2-3
4
5
6-7
8
9
10 - 11
12
13
14 - 15
16
Pin
Name
CLKIN
CLKA1:A4
VDD
GND
CLKB1:B4
S2
S1
CLKB1:B4
GND
VDD
CLKA1:A4
CLKOUT
Pin Type
Input
Output
Power
Power
Output
Input
Input
Output
Power
Power
Output
Input
Clock input (5 V tolerant).
Clock outputs A1:A4. See table above.
Power supply. Connect to 3.3 V.
Connect to ground.
Clock outputs B1:B4. See table above.
Select input 2. See table above. Internal pull-up.
Select input 1. See table above. Internal pull-up.
Clock outputs B1:B4. See table above.
Connect to ground.
Power supply. Connect to 3.3 V.
Clock outputs A1:A4. See table above.
Buffered output. Internal feedback on this pin.
Pin Description
IDT™ / ICS™
3.3 VOLT ZERO DELAY LOW SKEW BUFFER
2
ICS2309
REV F 041906
ICS2309
3.3 VOLT ZERO DELAY LOW SKEW BUFFER
ZERO DELAY BUFFERS
External Components
The ICS2309 requires a minimum number of external components for proper operation. Decoupling
capacitors of 0.01 mF should be connected between VDD and GND on pins 4 and 5, and VDD and GND
on pins 13 and 12, as close to the device as possible. A series termination resistor of 33Ω may be used to
each clock output pin to reduce reflections.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS2309. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Supply Voltage, VDD
All Inputs and Outputs
CLKIN and FBIN inputs
Electrostatic Discharge (HBM)
Ambient Operating Temperature (Commercial)
Ambient Operating Temperature (Industrial)
Storage Temperature
Junction Temperature
Soldering Temperature
7V
Rating
-0.5 V to VDD+0.5 V
-0.5 V to 5.5 V
2000 V
0 to +70°C
-40 to +85°C
-65 to +150°C
150°C
260°C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature (Industrial)
Ambient Operating Temperature (Commercial)
Power Supply Voltage (measured in respect to GND)
Min.
-40
0
+3.0
Typ.
Max.
+85
+70
+3.6
Units
°C
°C
V
IDT™ / ICS™
3.3 VOLT ZERO DELAY LOW SKEW BUFFER
3
ICS2309
REV F 041906
ICS2309
3.3 VOLT ZERO DELAY LOW SKEW BUFFER
ZERO DELAY BUFFERS
DC Electrical Characteristics
ICS2309M-1, VDD = 3.3 V ±0.3 V,
Ambient Temperature -40 to +85°C (Industrial), (0-70°C Commercial)
Parameter
Operating Voltage
Input High Voltage
Input Low Voltage
Input Low Current
Input High Current
Output High Voltage
Output Low Voltage
Operating Supply Current
Power Down Supply
Current
Short Circuit Current
Input Capacitance
Symbol
VDD
V
IH
V
IL
I
IL
I
IH
V
OH
V
OL
IDD
Conditions
Min.
3.0
2
Typ.
Max.
3.6
0.8
Units
V
V
V
µA
µA
V
V
mA
µA
mA
pF
VIN = 0V
VIN = VDD
I
OH
= -8 mA
I
OL
= 8 mA
No Load
CLKIN = 0, Note 1
2.4
50
100
0.4
32
12
±50
5
I
OS
C
IN
Each output
S2, S1, CLKIN
Note 1: When there is no clock signal present at CLKIN, the ICS2309 will enter power down mode. The
PLL is stopped and the outputs are tri-state.
ICS2309M-1, VDD = 3.3 V ±0.3 V,
Ambient Temperature -40 to +85°C (Industrial), (0-70°C Commercial)
Parameter
Operating Voltage
Input High Voltage
Input Low Voltage
Input Low Current
Input High Current
Output High Voltage
Output Low Voltage
Operating Supply Current
Power Down Supply
Current
Short Circuit Current
Input Capacitance
Symbol
VDD
V
IH
V
IL
I
IL
I
IH
V
OH
V
OL
IDD
Conditions
Min.
3.0
2
Typ.
Max.
3.6
0.8
Units
V
V
V
µA
µA
V
V
mA
µA
mA
pF
VIN = 0V
VIN = VDD
I
OH
= -12 mA
I
OL
= 12 mA
No Load
CLKIN = 0, Note 1
2.4
50
100
0.4
32
12
±50
5
I
OS
C
IN
Each output
S2, S1, CLKIN
Note 1: When there is no clock signal present at CLKIN, the ICS2309 will enter power down mode. The
PLL is stopped and the outputs are tri-state.
IDT™ / ICS™
3.3 VOLT ZERO DELAY LOW SKEW BUFFER
4
ICS2309
REV F 041906
ICS2309
3.3 VOLT ZERO DELAY LOW SKEW BUFFER
ZERO DELAY BUFFERS
AC Electrical Characteristics
ICS2309M-1, VDD=3.3 V ±0.3 V,
Ambient temperature -40 to +85°C (Industrial), (0-70°C Commercial)
Parameter
Output Clock Frequency
Output Clock Frequency
Output Rise Time
Output Fall Time
Output Clock Duty Cycle
Output Clock Duty Cycle
Device to Device Skew
Output to Output Skew
Input to Output Skew
Input to Output Skew
(PLL bypass mode)
Cycle to Cycle Jitter
PLL Lock Time
Symbol
f
IN
t
OR
t
OF
t
DC
t
DC
Conditions
10 pF load, see table on page 2
30 pF load, see table on page 2
0.8 to 2.0 V, outputs loaded
2.0 to 0.8 V, outputs loaded
Measured at 1.4 V, Fout=66.67
MHz
Measured at 1.4 V, Fout=50
MHz
Rising edges at VDD/2
Rising edges at VDD/2
Rising edges at VDD/2
Rising edges at VDD/2, S2= 1,
S1 = 0
Measured at 66.67M, outputs
loaded
Note 2
Min.
10
10
Typ.
Max. Units
133
100
2.5
2.5
MHz
MHz
ns
ns
%
%
ps
ps
ps
ns
ps
ms
40
45
50
50
60
55
700
250
±350
1
5
8.7
200
1.0
Note 2: With VDD at a steady rate and valid input at CLKIN.
ICS2309M-1H, VDD=3.3 V ±0.3 V,
Ambient temperature -40 to +85°C (Industrial), (0-70°C Commercial)
Parameter
Output Clock Frequency
Output Clock Frequency
Output Rise Time
Output Fall Time
Output Clock Duty Cycle
Output Clock Duty Cycle
Device to Device Skew
Output to Output Skew
Input to Output Skew
Input to Output Skew
(PLL bypass mode)
Cycle to Cycle Jitter
PLL Lock Time
Symbol
f
IN
t
OR
t
OF
t
DC
t
DC
Conditions
10 pF load, see table on page 2
30 pF load, see table on page 2
0.8 to 2.0 V, outputs loaded
2.0 to 0.8 V, outputs loaded
Measured at 1.4 V, Fout=66.67
MHz
Measured at 1.4 V, Fout=50
MHz
Rising edges at VDD/2
Rising edges at VDD/2
Rising edges at VDD/2
Rising edges at VDD/2, S2= 1,
S1 = 0
Measured at 66.67M, outputs
loaded
Note 3
Min.
10
10
Typ.
Max. Units
133
100
1.5
1.5
MHz
MHz
ns
ns
%
%
ps
ps
ps
ns
ps
ms
40
45
50
50
60
55
700
250
±350
1
5
8.7
200
1.0
Note 3: With VDD at a steady rate and valid input at CLKIN.
IDT™ / ICS™
3.3 VOLT ZERO DELAY LOW SKEW BUFFER
5
ICS2309
REV F 041906
FPGA/CPLD
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