AM29LV065GU103RWHF datasheet, PDF

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AM29LV065GU103RWHF: DescriptionFlash, 8MX8, 100ns, PBGA63, 11 X 12 MM, 0.80 MM PITCH, FBGA-63; Categorystorage storage; File Size793KB，52 Pages; ManufacturerSPANSION; Websitehttp://www.spansion.com/; Environmental Compliance

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AM29LV065GU103RWHF Overview

Flash, 8MX8, 100ns, PBGA63, 11 X 12 MM, 0.80 MM PITCH, FBGA-63

AM29LV065GU103RWHF Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	SPANSION
Parts packaging code	BGA
package instruction	11 X 12 MM, 0.80 MM PITCH, FBGA-63
Contacts	63
Reach Compliance Code	compliant
ECCN code	3A991.B.1.A
Maximum access time	100 ns
JESD-30 code	R-PBGA-B63
JESD-609 code	e1
length	12 mm
memory density	67108864 bit
Memory IC Type	FLASH
memory width	8
Humidity sensitivity level	3
Number of functions	1
Number of terminals	63
word count	8388608 words
character code	8000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	8MX8
Package body material	PLASTIC/EPOXY
encapsulated code	TFBGA
Package shape	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE, FINE PITCH
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	260
Programming voltage	3 V
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	TIN SILVER COPPER
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	40
type	NOR TYPE
width	11 mm

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ADVANCE INFORMATION

Am29LV065GU

64 Megabit (8 M x 8-Bit) CMOS 3.0 Volt-only

Uniform Sector Flash Memory with VersatileI/O Control

DISTINCTIVE CHARACTERISTICS

ARCHITECTURAL ADVANTAGES

■

Single power supply operation

— 2.7 to 3.6 volt read, erase, and program operations

■

VersatileI/O control

— Device generates data output voltages and tolerates

data input voltages as determined by the voltage on

the V

■

SecSi (Secured Silicon) Sector region

— 256-byte sector for permanent, secure identification

through an 16-byte random Electronic Serial Number

— May be programmed and locked at the factory or by

the customer

— Accessible through a command sequence

■

Compatibility with JEDEC standards

— Pinout and software compatible with

single-power-supply Flash standard

■

Manufactured on 0.17 µm process technology

■

Flexible sector architecture

— One hundred twenty-eight 64 Kbyte sectors

■

Package options

— 48-pin Standard and Reverse TSOP

— 63-ball FBGA

■

Minimum 1 million erase cycle guarantee per sector

■

20-year data retention at 125°C

— Reliable operation for the life of the system

SOFTWARE FEATURES

■

CFI (Common Flash Interface) compliant

— Allows host system to accommodate different Flash

devices by providing device-specific information

■

Erase Suspend/Erase Resume

— Read/program other sectors before an erase

operation is complete

■

Program Suspend/Program Resume

— Read other sectors before an program operation is

complete

■

Data# Polling and toggle bits

— Indicates program or erase operation completion

■

Unlock Bypass Program command

— Reduces overall programming time when issuing

multiple program command sequences

HARDWARE FEATURES

■

Sector Protection

— A hardware method to lock a sector to prevent

program or erase operations within that sector

— Sectors can be locked in-system or via programming

equipment

— Temporary Sector Unprotect feature allows code

changes in previously locked sectors

■

Ready/Busy# input (RY/BY#)

— Indicates program or erase cycle completion

■

Hardware reset input (RESET#)

— Resets the device for a new operation

■

ACC input

— Accelerates programming time for higher throughput

during system production

PERFORMANCE CHARACTERISTICS

■

High performance

— Access time ratings as fast as 70 ns

■

Program and Erase Performance (V

not applied to

the ACC input)

— Sector erase time: 0.6 s typical for each 64 Kbyte

sector

■

Ultra low power consumption (typical values at 3.0 V,

5 MHz)

— 9 mA typical active read current

— 26 mA typical erase/program current

— 200 nA typical standby mode current

This Data Sheet states AMD’s current technical specifications regarding the Products described herein. This Data Sheet may be revised by subsequent versions or modifications

due to changes in technical specifications.This document contains information on a product under developement at Advanced Micro Devices. The information is intended to help

you evaluate this product. Do not design in this product without contacting the factory. AMD reserves the right to change or discontinue work on this proposed product without

notice.

Publication#

25288

Rev:

Amendment/1

Issue Date:

August 28, 2002

Refer to AMD’s Website (www.amd.com) for the latest information.

A D V A N C E

I N F O R M A T I O N

TABLE OF CONTENTS

Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 5

Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8

Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 9

Table 1. Device Bus Operations .......................................................9

Write Operation Status . . . . . . . . . . . . . . . . . . . . 28

DQ7: Data# Polling ................................................................. 28

Figure 5. Data# Polling Algorithm .................................................. 28

DQ6: Toggle Bit I .................................................................... 29

Figure 6. Toggle Bit Algorithm........................................................ 29

VersatileI/O (V

) Control ...................................................... 9

Requirements for Reading Array Data ..................................... 9

Writing Commands/Command Sequences ............................ 10

Automatic Sleep Mode ........................................................... 10

RESET#: Hardware Reset Pin ............................................... 10

Output Disable Mode .............................................................. 11

Table 2. Sector Address Table ........................................................11

Table 3. Am29LV065G Autoselect Codes, (High Voltage Method) 15

DQ2: Toggle Bit II ................................................................... 30

Reading Toggle Bits DQ6/DQ2 ............................................... 30

DQ5: Exceeded Timing Limits ................................................ 30

DQ3: Sector Erase Timer ....................................................... 30

Table 11. Write Operation Status ................................................... 31

Absolute Maximum Ratings . . . . . . . . . . . . . . . . 32

Figure 7. Maximum Negative Overshoot Waveform ..................... 32

Figure 8. Maximum Positive Overshoot Waveform....................... 32

Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . 32

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 33

Figure 9. I

CC1

Current vs. Time (Showing Active and

Automatic Sleep Currents) ............................................................. 34

Figure 10. Typical I

CC1

vs. Frequency ............................................ 35

Sector Group Protection and Unprotection ............................. 16

Table 4. Sector Group Protection/Unprotection Address Table .....16

Temporary Sector Group Unprotect ....................................... 17

Figure 1. Temporary Sector Group Unprotect Operation................ 17

Figure 2. In-System Sector Group Protect/Unprotect Algorithms ... 18

Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Figure 11. Test Setup.................................................................... 36

Table 12. Test Specifications ......................................................... 36

Figure 12. Input Waveforms and Measurement Levels ................. 36

SecSi (Secured Silicon) Sector Flash Memory Region ....... 19

Table 5. SecSi Sector Contents ......................................................19

Hardware Data Protection ...................................................... 19

Common Flash Memory Interface (CFI) . . . . . . . 20

Table 6. CFI Query Identification String ..........................................

Table 7. System Interface String.....................................................

Table 8. Device Geometry Definition ..............................................

Table 9. Primary Vendor-Specific Extended Query ........................

Key to Switching Waveforms. . . . . . . . . . . . . . . . 36

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 37

Figure 13. Read Operation Timings ...............................................

Figure 14. Reset Timings ...............................................................

Figure 15. Program Operation Timings..........................................

Figure 16. Accelerated Program Timing Diagram..........................

Figure 17. Chip/Sector Erase Operation Timings ..........................

Figure 18. Data# Polling Timings (During Embedded Algorithms).

Figure 19. Toggle Bit Timings (During Embedded Algorithms)......

Figure 20. DQ2 vs. DQ6.................................................................

Figure 21. Temporary Sector Group Unprotect Timing Diagram ...

Figure 22. Sector Group Protect and Unprotect Timing Diagram ..

Figure 23. Alternate CE# Controlled Write

(Erase/Program) Operation Timings ..............................................

Command Definitions . . . . . . . . . . . . . . . . . . . . . 22

Reading Array Data ................................................................ 22

Reset Command ..................................................................... 23

Autoselect Command Sequence ............................................ 23

Enter SecSi Sector/Exit SecSi Sector

Command Sequence .............................................................. 23

Byte Program Command Sequence ....................................... 23

Figure 3. Program Operation .......................................................... 24

Chip Erase Command Sequence ........................................... 24

Sector Erase Command Sequence ........................................ 25

Erase Suspend/Erase Resume Commands ........................... 25

Program Suspend/Program Resume Commands .................. 26

Figure 4. Erase Operation............................................................... 26

Table 10. Am29LV065G Command Definitions ..............................27

Erase And Programming Performance . . . . . . .

Latchup Characteristics . . . . . . . . . . . . . . . . . . . .

TSOP Pin Capacitance . . . . . . . . . . . . . . . . . . . . .

Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . .

Physical Dimensions . . . . . . . . . . . . . . . . . . . . . .

Draft Revision Summary . . . . . . . . . . . . . . . . . . .

August 28, 2002

Am29LV065GU

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