A54SX32CQG208B datasheet, PDF - EEWORLD Datasheet

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A54SX32CQG208B: DescriptionField Programmable Gate Array, 2880 CLBs, 32000 Gates, 205MHz, CMOS, CQFP208, CERAMIC, QFP-208; CategoryProgrammable logic devices Programmable logic; File Size377KB，46 Pages; ManufacturerMicrosemi; Websitehttps://www.microsemi.com; Environmental Compliance

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A54SX32CQG208B Overview

Field Programmable Gate Array, 2880 CLBs, 32000 Gates, 205MHz, CMOS, CQFP208, CERAMIC, QFP-208

A54SX32CQG208B Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Objectid	1825033527
package instruction	QFF,
Reach Compliance Code	compliant
ECCN code	3A001.A.2.C
Other features	48000 SYSTEM GATES AVAILABLE
maximum clock frequency	205 MHz
Combined latency of CLB-Max	1 ns
JESD-30 code	S-CQFP-F208
JESD-609 code	e4
length	29.21 mm
Configurable number of logic blocks	2880
Equivalent number of gates	32000
Number of terminals	208
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	2880 CLBS, 32000 GATES
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	QFF
Package shape	SQUARE
Package form	FLATPACK
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified
Filter level	MIL-STD-883 Class B
Maximum seat height	3.06 mm
Maximum supply voltage	3.63 V
Minimum supply voltage	2.97 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	GOLD OVER NICKEL
Terminal form	FLAT
Terminal pitch	0.5 mm
Terminal location	QUAD
width	29.21 mm

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v2.1

SX Family FPGAs RadTolerant and HiRel

Features

RadTolerant SX Family

•

Tested Total Ionizing Dose (TID) Survivability Level

Radiation Performance to 100 Krads (Si) (I

Standby

Parametric)

Devices Available from Tested Pedigreed Lots

Up to 160 MHz On-Chip Performance

Offered as Class B and E-Flow (Actel Space Level

Flow)

QMl Certified Devices

High Density Devices

•

16,000 and 32,000 Available Logic Gates

Up to 225 User I/Os

Up to 1,080 Dedicated Flip-Flops

Easy Logic Integration

•

Nonvolatile, User Programmable

Highly Predictable Performance with 100%

Automatic Place-and-Route

100% Resource Utilization with 100% Pin Locking

Mixed Voltage Support – 3.3 V Operation with 5.0 V

Input Tolerance for Low-Power Operation

JTAG Boundary Scan Testing in Compliance with IEEE

Standard 1149.1

Secure Programming Technology Prevents Reverse

Engineering and Design Theft

Permanently Programmed for Operation on Power-

Unique In-System Diagnostic and Debug Facility with

Silicon Explorer

Software Design Support with Actel Designer and

Libero

Integrated Design Environment (IDE) Tools

Predictable, Reliable, and Permanent Antifuse

Technology Performance

HiRel SX Family

•

Fastest HiRel FPGA Family Available

Up to 240 MHz On-Chip Performance

Low Cost Prototyping Vehicle for RadTolerant

Devices

Offered as Commercial or Military Temperature

Tested and Class B

Cost Effective QML MIL-Temp Plastic Packaging

Options

Standard Hermetic Packaging Offerings

QML Certified Devices

Product Profile

Device

Capacity

System Gates

Logic Gates

Logic Modules

Combinatorial Cells

User I/Os (Maximum)

JTAG

Packages (by pin count)

CQFP

RT54SX16

(Obsolete)

24,000

16,000

1,452

528

924

179

Yes

208, 256

A54SX16

24,000

16,000

1,452

528

924

180

Yes

208, 256

RT54SX32

(Obsolete)

48,000

32,000

2,880

1,080

1,800

227

Yes

208, 256

A54SX32

48,000

32,000

2,880

1,080

1,800

228

Yes

208, 256

March 2005

See Actel’s website for the latest version of the datasheet.

SX Family FPGAs RadTolerant and HiRel

Table of Contents

SX Family FPGAs RadTolerant and HiRel

General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1

SX Family Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2

Other Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8

Development Tool Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10

RTSX Probe Circuit Control Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10

Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-11

Related Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-11

3.3 V / 5 V Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-12

Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-13

Power-Up Sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-13

Power-Down Sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-13

Package Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-14

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-15

Temperature and Voltage Derating Factors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-17

SX Timing Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-17

Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-19

A54SX16 Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-20

RT54SX16 Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-22

A54SX32 Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-24

RT54SX32 Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-26

Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-28

Package Pin Assignments

208-Pin CQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1

256-Pin CQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5

Datasheet Information

List of Changes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1

Datasheet Categories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2

Export Administration Regulations (EAR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2

v2.1

iii

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