92HD98B1X5NDGXYYX datasheet, PDF

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92HD98B1X5NDGXYYX: DescriptionConsumer Circuit, 5 X 5 MM, 0.40 MM PITCH, ROHS COMPLIANT, QFN-40; CategoryOther integrated circuit (IC) Consumption circuit; File Size3MB，277 Pages; ManufacturerIDT (Integrated Device Technology)

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92HD98B1X5NDGXYYX Overview

Consumer Circuit, 5 X 5 MM, 0.40 MM PITCH, ROHS COMPLIANT, QFN-40

92HD98B1X5NDGXYYX Parametric

Parameter Name	Attribute value
Maker	IDT (Integrated Device Technology)
Parts packaging code	QFN
package instruction	HVQCCN,
Contacts	40
Reach Compliance Code	compliant
Commercial integrated circuit types	CONSUMER CIRCUIT
JESD-30 code	S-XQCC-N40
length	5 mm
Number of functions	1
Number of terminals	40
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	UNSPECIFIED
encapsulated code	HVQCCN
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Certification status	Not Qualified
Maximum seat height	1 mm
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
surface mount	YES
Temperature level	COMMERCIAL
Terminal form	NO LEAD
Terminal pitch	0.4 mm
Terminal location	QUAD
width	5 mm

92HD98B1X5NDGXYYX Preview

DATASHEET

SINGLE CHIP PC AUDIO SYSTEM

CODEC+MONO SPEAKER AMPLIFIER+CAPLESS HP+LDO

92HD98

Features

•

4 Channels (2 stereo DACs and 2 stereo ADCs)

with 24-bit resolution

•

Supports full-duplex stereo audio and simultaneous

VoIP

Description

The 92HD98 single-chip audio system is a low power

optimized, high fidelity, 4-channel audio codec with MONO

integrated speaker amplifier, capless headphone amplifier,

and low drop out voltage regulator.

The high integration of the 92HD98 enables the smallest

PCB footprint with the lowest system BOM count and cost.

92HD98 provides high quality HD Audio capability to

notebook and business desktop PC applications.

•

2W Class-D MONO BTL speaker amplifier @

4 ohms and 5V

•

10 band hardware parametric equalizer

Hardware compressor limiter

Dedicated BTL high pass filter for speaker protection

•

Capless headphone amplifier with charge

pump/LDO

Combo Jack Support allowing for dual-function

headphone and headset detection

Full HDA015-B low power support

Internal digital core LDO voltage regulator

Microsoft WLP desktop premium logo compliant

Dual SPDIF for WLP compliant support of

simultaneous HDMI and SPDIF output

Support for 1.5V and 3.3V HDA signaling

Two digital microphone inputs (mono, stereo, or

quad microphones)

High performance analog mixer

2 adjustable VREF Out pins for analog microphone

bias

5 analog ports with port presence detect (4 single

ended, 1 BTL)

Analog and digital PC Beep support

AUX Audio Mode for playback

40-pad QFN RoHS packages

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SINGLE CHIP PC AUDIO SYSTEM, CODEC+MONO SPEAKER AMPLIFIER+CAPLESS HP+LDO

Full HDA015-B low power support

•

Audio inactivity transitions codec from D0 to D3 low power mode

Resume from D3 to D0 with audio activity in < 10 msec

D3 to D0 transition with < -65dB pop/click

Port presence detect in D3 with or without bit clock

PC beep wake up in D3

Additional vendor specific modes for even lower power

Software Support

•

Intuitive IDT HD Sound graphical user interface that allows configurability and preference set-

tings

12 band fully parametric equalizer

• Constant, system-level effects tuned to optimize a particular platform can be combined with

user-mode “presets” tailored for specific acoustical environments and applications

• System-level effects automatically disabled when external audio connections made

Dynamics Processing

• Enables improved voice articulation

• Compressor/limiter allows higher average volume level without resonances or damage to

speakers.

IDT Vista APO wrapper

• Enables multiple APOs to be used with the IDT Driver

Microphone Beam Forming, Acoustic Echo Cancellation, and Noise Suppression

Dynamic Stream Switching

• Improved multi-streaming user experience with less support calls

Broad 3

party branded software including Creative, Dolby, DTS, and SRS

•

IDT CONFIDENTIAL

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92HD98

SINGLE CHIP PC AUDIO SYSTEM, CODEC+MONO SPEAKER AMPLIFIER+CAPLESS HP+LDO

TABLE OF CONTENTS

1. DESCRIPTION ........................................................................................................................ 11

1.1. Overview ..........................................................................................................................................11

1.2. Orderable Part Numbers ..................................................................................................................11

2. DETAILED DESCRIPTION ..................................................................................................... 12

2.1. Port Functionality .............................................................................................................................12

2.1.1. Port Characteristics ............................................................................................................12

2.1.2. Vref_Out .............................................................................................................................14

2.1.3. Jack Detect ........................................................................................................................14

2.1.4. SPDIF Output .....................................................................................................................14

2.2. Mixer ................................................................................................................................................16

2.3. ADC Multiplexers .............................................................................................................................17

2.4. Power Management .........................................................................................................................17

2.5. AFG D0 ............................................................................................................................................18

2.6. AFG D1 ............................................................................................................................................18

2.7. AFG D2 ............................................................................................................................................18

2.8. AFG D3 ............................................................................................................................................18

2.8.1. AFG D3cold .......................................................................................................................18

2.9. Vendor Specific Function Group Power States D4/D5 ....................................................................19

2.10. Low-voltage HDA Signaling ...........................................................................................................19

2.11. Multi-channel capture ....................................................................................................................19

2.12. EAPD .............................................................................................................................................21

2.13. Digital Microphone Support ...........................................................................................................24

2.14. Analog PC-Beep ............................................................................................................................28

2.15. Digital PC-Beep .............................................................................................................................30

2.16. Headphone Drivers ........................................................................................................................31

2.17. BTL Amplifier .................................................................................................................................31

2.18. BTL Amplifier High-Pass Filter .......................................................................................................31

2.18.1. Filter Description ..............................................................................................................32

2.19. EQ ..................................................................................................................................................32

2.20. Combo Jack Detection ...................................................................................................................32

2.21. GPIO ..............................................................................................................................................33

2.21.1. GPIO Pin mapping and shared functions .........................................................................33

2.21.2. SPDIF/Digital Microphone/GPIO Selection ......................................................................33

2.21.3. Digital Microphone/GPIO Selection .................................................................................33

2.22. HD Audio HDA015-B support ........................................................................................................33

2.23. Digital Core Voltage Regulator ......................................................................................................34

2.24. Aux Audio Support .........................................................................................................................35

2.24.1. General conditions in Aux Audio Mode: ...........................................................................35

2.24.2. Entering Aux Audio Mode ................................................................................................36

2.24.3. “Playback Path” Port Behavior (AnaIog I/O) ....................................................................37

2.24.4. When Port E presence detect = 0 ....................................................................................37

2.24.5. When Port E presence detect = 1 ....................................................................................37

2.24.6. SYSTEM DIAGRAMS (Analog I/O) ..................................................................................38

2.24.7. EAPD ...............................................................................................................................39

2.24.8. Analog PC_Beep .............................................................................................................39

2.24.9. Class-D BTL Issues .........................................................................................................39

2.24.10. Firmware/Software Requirements: .................................................................................39

3. CHARACTERISTICS ............................................................................................................... 40

3.1. Electrical Specifications ...................................................................................................................40

3.1.1. Absolute Maximum Ratings ...............................................................................................40

3.1.2. Recommended Operating Conditions ................................................................................40

3.2. 92HD98 Analog Performance Characteristics

(PRELIMINARY) ......................................................................41

3.3. Class-D BTL Amplifier Performance ................................................................................................44

3.4. Capless Headphone Supply Characteristics ....................................................................................45

3.5. AC Timing Specs .............................................................................................................................45

3.5.1. HD Audio Bus Timing .........................................................................................................45

3.5.2. SPDIF Timing .....................................................................................................................46

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SINGLE CHIP PC AUDIO SYSTEM, CODEC+MONO SPEAKER AMPLIFIER+CAPLESS HP+LDO

3.5.3. Digital Microphone Timing .................................................................................................46

3.5.4. GPIO Characteristics .........................................................................................................46

4. FUNCTIONAL BLOCK DIAGRAM .......................................................................................... 47

5. WIDGET DIAGRAM ................................................................................................................ 48

6. PORT AND PIN CONFIGURATIONS ..................................................................................... 49

6.1. Port Configurations ..........................................................................................................................49

6.2. Pin Configuration Default Register Settings .....................................................................................50

7. WIDGET INFORMATION ........................................................................................................ 51

7.1. Widget List .......................................................................................................................................52

7.2. Reset Key ........................................................................................................................................53

7.3. Root (NID = 00h): VendorID ............................................................................................................53

7.3.1. Root (NID = 00h): RevID ....................................................................................................54

7.3.2. Root (NID = 00h): NodeInfo ...............................................................................................54

7.4. AFG (NID = 01h): NodeInfo .............................................................................................................55

7.4.1. AFG (NID = 01h): FGType .................................................................................................55

7.4.2. AFG (NID = 01h): AFGCap ................................................................................................56

7.4.3. AFG (NID = 01h): PCMCap ...............................................................................................57

7.4.4. AFG (NID = 01h): StreamCap ............................................................................................58

7.4.5. AFG (NID = 01h): InAmpCap .............................................................................................59

7.4.6. AFG (NID = 01h): PwrStateCap .........................................................................................60

7.4.7. AFG (NID = 01h): GPIOCnt ...............................................................................................61

7.4.8. AFG (NID = 01h): OutAmpCap ..........................................................................................61

7.4.9. AFG (NID = 01h): PwrState ...............................................................................................62

7.4.10. AFG (NID = 01h): UnsolResp ..........................................................................................63

7.4.11. AFG (NID = 01h): GPIO ...................................................................................................63

7.4.12. AFG (NID = 01h): GPIOEn ...............................................................................................64

7.4.13. AFG (NID = 01h): GPIODir ..............................................................................................65

7.4.14. AFG (NID = 01h): GPIOWakeEn .....................................................................................66

7.4.15. AFG (NID = 01h): GPIOUnsol ..........................................................................................67

7.4.16. AFG (NID = 01h): GPIOSticky .........................................................................................68

7.4.17. AFG (NID = 01h): SubID ..................................................................................................68

7.4.18. AFG (NID = 01h): GPIOPlrty ............................................................................................69

7.4.19. AFG (NID = 01h): GPIODrive ...........................................................................................70

7.4.20. AFG (NID = 01h): DMic ....................................................................................................71

7.4.21. AFG (NID = 01h): DACMode ...........................................................................................72

7.4.22. AFG (NID = 01h): ADCMode ...........................................................................................73

7.4.23. AFG (NID = 01h): PortUse ...............................................................................................74

7.4.24. AFG (NID = 01h): ComJack .............................................................................................75

7.4.25. AFG (NID = 01h): VSPwrState .........................................................................................76

7.4.26. AFG (NID = 01h): AnaPort ...............................................................................................77

7.4.27. AFG (NID = 01h): AnaBTL ...............................................................................................78

7.4.28. AFG (NID = 01h): AnaBTLStatus .....................................................................................80

7.4.29. AFG (NID = 01h): AnaCapless .........................................................................................80

7.4.30. AFG (NID = 01h): Reset ...................................................................................................83

7.4.31. AFG (NID = 01h): AnaBeep .............................................................................................84

7.4.32. AFG (NID = 01h): EAPD ..................................................................................................85

7.4.33. AFG (NID = 01h): ComboJackTime (Available only on WB revision and beyond) ..........87

7.5. PortA (NID = 0Ah): WCap ................................................................................................................89

7.5.1. PortA (NID = 0Ah): PinCap ................................................................................................90

7.5.2. PortA (NID = 0Ah): ConLst .................................................................................................91

7.5.3. PortA (NID = 0Ah): ConLstEntry0 ......................................................................................92

7.5.4. PortA (NID = 0Ah): InAmpLeft ............................................................................................92

7.5.5. PortA (NID = 0Ah): InAmpRight .........................................................................................93

7.5.6. PortA (NID = 0Ah): ConSelectCtrl ......................................................................................93

7.5.7. PortA (NID = 0Ah): PwrState .............................................................................................94

7.5.8. PortA (NID = 0Ah): PinWCntrl ............................................................................................94

7.5.9. PortA (NID = 0Ah): UnsolResp ..........................................................................................95

7.5.10. PortA (NID = 0Ah): ChSense ...........................................................................................96

7.5.11. PortA (NID = 0Ah): EAPDBTLLR .....................................................................................96

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SINGLE CHIP PC AUDIO SYSTEM, CODEC+MONO SPEAKER AMPLIFIER+CAPLESS HP+LDO

7.5.12. PortA (NID = 0Ah): ConfigDefault ....................................................................................97

7.6. PortB (NID = 0Bh): WCap ................................................................................................................99

7.6.1. PortB (NID = 0Bh): PinCap ..............................................................................................101

7.6.2. PortB (NID = 0Bh): ConLst ...............................................................................................102

7.6.3. PortB (NID = 0Bh): ConLstEntry0 ....................................................................................103

7.6.4. PortB (NID = 0Bh): ConSelectCtrl ....................................................................................103

7.6.5. PortB (NID = 0Bh): PwrState ...........................................................................................103

7.6.6. PortB (NID = 0Bh): PinWCntrl ..........................................................................................104

7.6.7. PortB (NID = 0Bh): UnsolResp ........................................................................................105

7.6.8. PortB (NID = 0Bh): ChSense ...........................................................................................105

7.6.9. PortB (NID = 0Bh): EAPDBTLLR .....................................................................................106

7.6.10. PortB (NID = 0Bh): ConfigDefault ..................................................................................106

7.7. PortC (NID = 0Ch): WCap .............................................................................................................109

7.7.1. PortC (NID = 0Ch): PinCap ..............................................................................................110

7.7.2. PortC (NID = 0Ch): ConLst ..............................................................................................111

7.7.3. PortC (NID = 0Ch): ConLstEntry0 ....................................................................................112

7.7.4. PortC (NID = 0Ch): InAmpLeft .........................................................................................112

7.7.5. PortC (NID = 0Ch): InAmpRight .......................................................................................113

7.7.6. PortC (NID = 0Ch): ConSelectCtrl ...................................................................................113

7.7.7. PortC (NID = 0Ch): PwrState ...........................................................................................114

7.7.8. PortC (NID = 0Ch): PinWCntrl .........................................................................................114

7.7.9. PortC (NID = 0Ch): UnsolResp ........................................................................................115

7.7.10. PortC (NID = 0Ch): ChSense .........................................................................................116

7.7.11. PortC (NID = 0Ch): EAPDBTLLR ...................................................................................116

7.7.12. PortC (NID = 0Ch): ConfigDefault ..................................................................................117

7.8. PortD (NID = 0Dh): WCap .............................................................................................................120

7.8.1. PortD (NID = 0Dh): PinCap ..............................................................................................121

7.8.2. PortD (NID = 0Dh): ConLst ..............................................................................................122

7.8.3. PortD (NID = 0Dh): ConLstEntry0 ....................................................................................123

7.8.4. PortD (NID = 0Dh): ConSelectCtrl ...................................................................................123

7.8.5. PortD (NID = 0Dh): PwrState ...........................................................................................124

7.8.6. PortD (NID = 0Dh): PinWCntrl .........................................................................................125

7.8.7. PortD (NID = 0Dh): EAPDBTLLR .....................................................................................125

7.8.8. PortD (NID = 0Dh): ConfigDefault ....................................................................................125

7.9. (NID = 0Eh): Vendor Reserved .....................................................................................................129

7.10. PortF (NID = 0Fh): WCap ............................................................................................................130

7.10.1. PortF (NID = 0Fh): PinCap .............................................................................................131

7.10.2. PortF (NID = 0Fh): ConLst .............................................................................................132

7.10.3. PortF (NID = 0Fh): ConLstEntry0 ...................................................................................133

7.10.4. PortF (NID = 0Fh): InAmpLeft ........................................................................................133

7.10.5. PortF (NID = 0Fh): InAmpRight ......................................................................................134

7.10.6. PortF (NID = 0Fh): ConSelectCtrl ..................................................................................134

7.10.7. PortF (NID = 0Fh): PwrState ..........................................................................................135

7.10.8. PortF (NID = 0Fh): PinWCntrl ........................................................................................135

7.10.9. PortF (NID = 0Fh): UnsolResp .......................................................................................136

7.10.10. PortF (NID = 0Fh): ChSense ........................................................................................137

7.10.11. PortF (NID = 0Fh): EAPDBTLLR .................................................................................137

7.10.12. PortF (NID = 0Fh): ConfigDefault .................................................................................138

7.11. (NID = 10h): Vendor Reserved ....................................................................................................141

7.12. DMic0 (NID = 11h): WCap ...........................................................................................................142

7.12.1. DMic0 (NID = 11h): PinCap ...........................................................................................143

7.12.2. DMic0 (NID = 11h): InAmpLeft .......................................................................................144

7.12.3. DMic0 (NID = 11h): InAmpRight ....................................................................................145

7.12.4. DMic0 (NID = 11h): PwrState .........................................................................................145

7.12.5. DMic0 (NID = 11h): PinWCntrl .......................................................................................146

7.12.6. DMic0 (NID = 11h): UnsolResp ......................................................................................147

7.12.7. DMic0 (NID = 11h): ChSense ........................................................................................147

7.12.8. DMic0 (NID = 11h): ConfigDefault .................................................................................148

7.13. DMic1Vol (NID = 12h): WCap ......................................................................................................151

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Description	Consumer Circuit, 5 X 5 MM, 0.40 MM PITCH, ROHS COMPLIANT, QFN-40	Consumer Circuit, 5 X 5 MM, 0.40 MM PITCH, ROHS COMPLIANT, QFN-40	Consumer Circuit, 5 X 5 MM, 0.40 MM PITCH, ROHS COMPLIANT, QFN-40	Consumer Circuit, 5 X 5 MM, 0.40 MM PITCH, ROHS COMPLIANT, QFN-40	Consumer Circuit, 5 X 5 MM, 0.40 MM PITCH, ROHS COMPLIANT, QFN-40	Consumer Circuit, 5 X 5 MM, 0.40 MM PITCH, ROHS COMPLIANT, QFN-40	Consumer Circuit, 5 X 5 MM, 0.40 MM PITCH, ROHS COMPLIANT, QFN-40	Consumer Circuit, 5 X 5 MM, 0.40 MM PITCH, ROHS COMPLIANT, QFN-40
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	QFN	QFN	QFN	QFN	QFN	QFN	QFN	QFN
package instruction	HVQCCN,	HVQCCN,	HVQCCN,	HVQCCN,	HVQCCN,	HVQCCN,	HVQCCN,	HVQCCN,
Contacts	40	40	40	40	40	40	40	40
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant	compliant	compliant
Commercial integrated circuit types	CONSUMER CIRCUIT	CONSUMER CIRCUIT	CONSUMER CIRCUIT	CONSUMER CIRCUIT	CONSUMER CIRCUIT	CONSUMER CIRCUIT	CONSUMER CIRCUIT	CONSUMER CIRCUIT
JESD-30 code	S-XQCC-N40	S-XQCC-N40	S-XQCC-N40	S-XQCC-N40	S-XQCC-N40	S-XQCC-N40	S-XQCC-N40	S-XQCC-N40
length	5 mm	5 mm	5 mm	5 mm	5 mm	5 mm	5 mm	5 mm
Number of functions	1	1	1	1	1	1	1	1
Number of terminals	40	40	40	40	40	40	40	40
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
Package body material	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
encapsulated code	HVQCCN	HVQCCN	HVQCCN	HVQCCN	HVQCCN	HVQCCN	HVQCCN	HVQCCN
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1 mm	1 mm	1 mm	1 mm	1 mm	1 mm	1 mm	1 mm
Maximum supply voltage (Vsup)	5.25 V	5.25 V	5.25 V	5.25 V	5.25 V	5.25 V	5.25 V	5.25 V
Minimum supply voltage (Vsup)	4.75 V	4.75 V	4.75 V	4.75 V	4.75 V	4.75 V	4.75 V	4.75 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal form	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD
Terminal pitch	0.4 mm	0.4 mm	0.4 mm	0.4 mm	0.4 mm	0.4 mm	0.4 mm	0.4 mm
Terminal location	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD
width	5 mm	5 mm	5 mm	5 mm	5 mm	5 mm	5 mm	5 mm

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