NC7S08 — TinyLogic
®
HS 2-Input AND Gate
March 2008
NC7S08
TinyLogic
®
HS 2-Input AND Gate
Features
■
Space saving SOT23 or SC70 5-lead package
■
Ultra small MicroPak™ Pb-Free leadless package
■
High Speed; t
PD
3.5ns typ
■
Low Quiescent Power; I
CC
<
1µA
■
Balanced Output Drive; 2mA I
OL
, –2mA I
OH
■
Broad V
CC
Operating Range; 2V–6V
■
Balanced Propagation Delays
■
Specified for 3V operation
General Description
The NC7S08 is a single 2-Input high performance
CMOS AND Gate. Advanced Silicon Gate CMOS fabri-
cation assures high speed and low power circuit opera-
tion over a broad V
CC
range. ESD protection diodes
inherently guard both inputs and output with respect to
the V
CC
and GND rails. Three stages of gain between
inputs and outputs assures high noise immunity and
reduced sensitivity to input edge rate.
Ordering Information
Order
Number
NC7S08M5X
NC7S08P5X
NC7S08L6X
Package
Number
MA05B
MAA05A
MAC06A
Product Code
Top Mark
7S08
S08
PP
Package Description
5-Lead SOT23, JEDEC MO-178,
1.6mm
5-Lead SC70, EIAJ SC-88a,
1.25mm Wide
6-Lead MicroPak, 1.0mm Wide
Supplied As
3k Units on Tape and Reel
3k Units on Tape and Reel
5k Units on Tape and Reel
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1995 Fairchild Semiconductor Corporation
NC7S08 Rev. 1.9.0
www.fairchildsemi.com
NC7S08 — TinyLogic
®
HS 2-Input AND Gate
Connection Diagram
Pin Assignments for SC70 and SOT23
Logic Symbol
IEEE/IEC
Function Table
(Top View)
Y
=
AB
Inputs
Pad Assignments for MicroPak
Output
B
L
H
L
H
A
L
L
H
H
H
=
HIGH Logic Level
L
=
LOW Logic Level
Y
L
L
L
H
(Top Thru View)
Pin Description
Pin Names
A, B
Y
NC
Description
Inputs
Output
No Connect
©1995 Fairchild Semiconductor Corporation
NC7S08 Rev. 1.9.0
www.fairchildsemi.com
2
NC7S08 — TinyLogic
®
HS 2-Input AND Gate
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CC
I
IK
Supply Voltage
DC Input Diode Current
@ V
IN
≤
–0.5V
@ V
IN
≥
V
CC
+0.5V
DC Input Voltage
DC Output Diode Current
@ V
OUT
<
–0.5V
@ V
OUT
>
V
CC
+0.5V
DC Output Voltage
Parameter
Rating
–0.5V to +7.0V
–20mA
+20mA
–0.5V to V
CC
+0.5V
–20mA
+20mA
–0.5V to V
CC
+ 0.5V
±12.5mA
±25mA
–65°C to +150°C
150°C
260°C
200mW
150mW
V
IN
I
OK
V
OUT
I
OUT
I
CC
or I
GND
T
STG
T
J
T
L
P
D
DC Output Sourceor Sink Current
DC V
CC
or Ground Current per Output Pin
Storage Temperature
Junction Temperature
Lead Temperature (Soldering, 10 seconds)
Power Dissipation @ +85°C
SOT23-5
SC70-5
Recommended Operating Conditions
(1)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
CC
V
IN
V
OUT
T
A
t
r
, t
f
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Input Rise and Fall Time
V
CC
@ 2.0V
V
CC
@ 3.0V
V
CC
@ 4.5V
V
CC
@ 6.0V
Thermal Resistance
SOT23-5
SC70-5
Parameter
Rating
2.0V to 6.0V
0V to V
CC
0V to V
CC
–40°C to +85°C
0ns to 1000ns
0ns to 750ns
0ns to 500ns
0ns to 400ns
300°C/W
425°C/W
θ
JA
Notes:
1. Unused inputs must be held HIGH or LOW. They may not float.
©1995 Fairchild Semiconductor Corporation
NC7S08 Rev. 1.9.0
www.fairchildsemi.com
3
NC7S08 — TinyLogic
®
HS 2-Input AND Gate
DC Electrical Characteristics
T
A
=
+25°C
Symbol
V
IH
V
IL
V
OH
T
A
=
–40°C
to +85°C
Max.
Min.
1.50
0.7 x V
CC
0.50
0.50
0.3 x V
CC
1.90
2.90
4.40
5.90
2.63
4.13
5.63
0.10
0.10
0.10
0.10
0.26
0.26
0.26
±0.1
1.0
0.10
0.10
0.10
0.10
0.33
0.33
0.33
±1.0
10.0
µA
µA
V
V
V
Parameter
HIGH Level Input
Voltage
LOW Level Input
Voltage
HIGH Level Output
Voltage
V
CC
(V)
2.0
3.0-6.0
2.0
3.0-6.0
2.0
3.0
4.5
6.0
3.0
4.5
6.0
Conditions
Min.
1.50
0.7 x V
CC
Typ.
Max.
Units
V
0.3 x V
CC
I
OH
=
–20µA,
V
IN
=
V
IH
1.90
2.90
4.40
5.90
V
IN
=
V
IH
,
I
OH
=
–1.3mA
V
IN
=
V
IH
,
I
OH
=
–2mA
V
IN
=
V
IH
,
I
OH
=
–2.6mA
I
OL
=
20µA
V
IN
=
V
IL
2.68
4.18
5.68
2.0
3.0
4.5
6.0
2.85
4.35
5.85
0.0
0.0
0.0
0.0
V
IN
=
V
IH
or V
IL
,
I
OH
=
1.3mA
V
IN
=
V
IH
or V
IL
,
I
OL
=
2mA
V
IN
=
V
IH
or V
IL
,
I
OL
=
2.6mA
V
IN
=
V
CC
, GND
V
IN
=
V
CC
, GND
0.1
0.1
0.1
V
OL
LOW Level Output
Voltage
2.0
3.0
4.5
6.0
3.0
4.5
6.0
I
IN
I
CC
Input Leakage
Current
Quiescent Supply
Current
6.0
6.0
©1995 Fairchild Semiconductor Corporation
NC7S08 Rev. 1.9.0
www.fairchildsemi.com
4
NC7S08 — TinyLogic
®
HS 2-Input AND Gate
AC Electrical Characteristics
T
A
=
+25°C
Symbol
Parameter
V
CC
(V) Conditions
5.0
2.0
3.0
4.5
6.0
t
TLH
, t
THL
Output Transition
Time
5.0
2.0
3.0
4.5
6.0
C
IN
C
PD
Input Capacitance
Power Dissipation
Capacitance
Open
5.0
(2)
T
A
=
–40°C
to +85°C
Min.
Max.
125
35
25
21
15
100
27
20
17
10
125
35
25
21
10
155
45
31
26
10
Min.
Typ.
3.5
20
11
8
7
Max.
Figure
Units Number
ns
Figure 1
Figure 3
t
PLH
, t
PHL
Propagation Delay
C
L
=
15pF
C
L
=
50pF
C
L
=
15pF
C
L
=
50pF
3.0
25
16
11
9
2
6
ns
Figure 1
Figure 3
pF
pF
Figure 2
Note:
2. C
PD
is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current
consumption (I
CCD
) at no output loading and operating at 50% duty cycle. (See Figure 2.) C
PD
is related to I
CCD
dynamic operating current by the expression: I
CCD
=
(C
PD
)(V
CC
)(f
IN
) + (I
CC
static).
AC Loading and Waveforms
C
L
includes load and stray capacitance
Input PRR
=
1.0 MHz; t
W
=
500 ns
Figure 1. AC Test Circuit
Figure 3. AC Waveforms
Input
=
AC Waveform;
PRR
=
variable; Duty Cycle
=
50%
Figure 2. I
CCD
Test Circuit
©1995 Fairchild Semiconductor Corporation
NC7S08 Rev. 1.9.0
www.fairchildsemi.com
5
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