PD -96393
IRF6810STRPbF
IRF6810STR1PbF
l
l
l
l
l
l
l
l
l
l
DirectFET
plus
Power MOSFET
RoHS Compliant and Halogen Free
Typical values (unless otherwise specified)
Low Profile (<0.7 mm)
Dual Sided Cooling Compatible
V
DSS
V
GS
R
DS(on)
R
DS(on)
Ultra Low Package Inductance
25V max ±16V max 4.0mΩ @ 10V 5.6mΩ @ 4.5V
Optimized for High Frequency Switching
Ideal for CPU Core DC-DC Converters
Q
g tot
Q
gd
Q
gs2
Q
rr
Q
oss
V
gs(th)
Optimized for Control FET Application
7.4nC 2.7nC 0.98nC 12nC
8.9nC
1.6V
Compatible with existing Surface Mount Techniques
100% Rg tested
Footprint compatible to DirectFET
D
G
S
D
®
Applicable DirectFET Outline and Substrate Outline
S1
S2
SB
M2
M4
L4
S1
L6
DirectFET
®
plus
ISOMETRIC
L8
Description
The IRF6810STRPbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFET
TM
packaging to
achieve improved performance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET package is
compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection
soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET
package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6810STRPbF has low gate resistance and low charge along with ultra low package inductance providing significant reduction in
switching losses. The reduced losses make this product ideal for high efficiency DC-DC converters that power the latest generation of
processors operating at higher frequencies. The IRF6810STRPbF has been optimized for the control FET socket of synchronous buck
operating from 12 volt bus converters.
Absolute Maximum Ratings
Parameter
V
DS
V
GS
I
D
@ T
A
= 25°C
I
D
@ T
A
= 70°C
I
D
@ T
C
= 25°C
I
DM
E
AS
I
AR
15
Typical RDS(on) (mΩ)
Max.
Units
V
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Single Pulse Avalanche Energy
Avalanche Current
g
e
e
f
Ãg
h
VGS, Gate-to-Source Voltage (V)
25
±16
16
13
50
130
51
13
14.0
12.0
10.0
8.0
6.0
4.0
2.0
0.0
0
5
10
15
ID= 13A
VDS= 20V
VDS= 13V
VDS= 5V
A
mJ
A
ID = 16A
10
TJ = 125°C
5
T J = 25°C
0
0
2
4
6
8
10
12
14
16
20
VGS, Gate -to -Source Voltage (V)
Fig 1.
Typical On-Resistance vs. Gate Voltage
QG Total Gate Charge (nC)
Fig 2.
Typical Total Gate Charge vs Gate-to-Source Voltage
Notes:
Click on this section to link to the appropriate technical paper.
Click on this section to link to the DirectFET Website.
Surface mounted on 1 in. square Cu board, steady state.
T
C
measured with thermocouple mounted to top (Drain) of part.
Repetitive rating; pulse width limited by max. junction temperature.
Starting T
J
= 25°C, L = 0.601mH, R
G
= 50Ω, I
AS
= 13A.
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1
08/08/11
IRF6810STRPbF
Static @ T
J
= 25°C (unless otherwise specified)
Parameter
BV
DSS
ΔΒV
DSS
/ΔT
J
R
DS(on)
V
GS(th)
ΔV
GS(th)
/ΔT
J
I
DSS
I
GSS
gfs
Q
g
Q
gs1
Q
gs2
Q
gd
Q
godr
Q
sw
Q
oss
R
G
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Total Gate Charge
Pre-Vth Gate-to-Source Charge
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
Gate Charge Overdrive
Switch Charge (Q
gs2
+ Q
gd
)
Output Charge
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min.
25
–––
–––
–––
1.1
–––
–––
–––
–––
–––
182
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ. Max. Units
–––
22
4.0
5.6
1.6
-5.9
–––
–––
–––
–––
–––
7.4
1.6
0.98
2.7
2.1
3.68
8.9
0.4
8.2
22
11
4.8
1038
325
74
–––
–––
5.2
7.3
2.1
–––
V
Conditions
V
GS
= 0V, I
D
= 250μA
mV/°C Reference to 25°C, I
D
= 1mA
V
GS
= 10V, I
D
= 16A
mΩ
V
GS
= 4.5V, I
D
= 13A
i
i
V
V
DS
= V
GS
, I
D
= 25μA
mV/°C
V
DS
= 20V, V
GS
= 0V
1.0
μA
V
DS
= 20V, V
GS
= 0V, T
J
= 125°C
150
V
GS
= 16V
100
nA
V
GS
= -16V
-100
V
DS
= 13V, I
D
=13A
–––
S
11
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
nC
V
DS
= 13V
V
GS
= 4.5V
I
D
= 13A
See Fig. 15
nC
Ω
V
DS
= 16V, V
GS
= 0V
V
DD
= 13V, V
GS
= 4.5V
I
D
= 13A
R
G
= 1.8Ω
V
GS
= 0V
Ãi
ns
pF
V
DS
= 13V
ƒ = 1.0MHz
Diode Characteristics
Parameter
I
S
I
SM
V
SD
t
rr
Q
rr
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Min.
–––
–––
–––
–––
–––
Typ. Max. Units
–––
–––
–––
12
8.4
16
130
1.0
18
13
V
ns
nC
A
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
T
J
= 25°C, I
S
= 13A, V
GS
= 0V
T
J
= 25°C, I
F
=13A
di/dt = 280A/μs
G
D
Ãg
S
i
Reverse Recovery Time
Reverse Recovery Charge
i
Notes:
Pulse width
≤
400μs; duty cycle
≤
2%.
2
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IRF6810STRPbF
Absolute Maximum Ratings
P
D
@T
A
= 25°C
P
D
@T
A
= 70°C
P
D
@T
C
= 25°C
T
P
T
J
T
STG
Power Dissipation
Power Dissipation
Power Dissipation
Peak Soldering Temperature
Operating Junction and
Storage Temperature Range
e
e
f
Parameter
Max.
2.1
1.3
20
270
-40 to + 150
Units
W
°C
Thermal Resistance
R
θJA
R
θJA
R
θJA
R
θJC
R
θJ-PCB
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Case
Junction-to-PCB Mounted
Linear Derating Factor
el
jl
kl
fl
Parameter
Typ.
–––
12.5
20
–––
1.0
0.017
Max.
60
–––
–––
6.3
–––
Units
°C/W
eÃ
W/°C
100
D = 0.50
Thermal Response ( Z thJA )
10
0.20
0.10
0.05
0.02
0.01
τ
J
τ
J
τ
1
1
R
1
R
1
τ
2
R
2
R
2
R
3
R
3
τ
3
R
4
R
4
τ
A
τ
4
τ
A
Ri (°C/W)
20.0398
11.5686
25.1338
3.20948
τi
(sec)
3.8916
0.0561
0.6065
0.0013
0.1
τ
1
τ
2
τ
3
τ
4
Ci=
τi/Ri
Ci=
τi/Ri
0.01
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
0.01
0.1
1
10
100
1000
0.001
1E-006
1E-005
0.0001
0.001
t1 , Rectangular Pulse Duration (sec)
Notes:
Used double sided cooling , mounting pad with large heatsink.
Mounted on minimum footprint full size board with metalized
back and with small clip heatsink.
Fig 3.
Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
R
θ
is measured at
T
J
of approximately 90°C.
Surface mounted on 1 in. square Cu
(still air).
Mounted to a PCB
with
small clip heatsink (still air)
Mounted on minimum
footprint full size board with
metalized back and with small
clip heatsink (still air)
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3
IRF6810STRPbF
1000
TOP
VGS
10V
5.0V
4.5V
3.5V
3.0V
2.8V
2.5V
2.3V
1000
TOP
VGS
10V
5.0V
4.5V
3.5V
3.0V
2.8V
2.5V
2.3V
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
100
100
BOTTOM
10
BOTTOM
10
1
0.1
1
2.3V
2.3V
≤
60μs PULSE WIDTH
0.01
0.1
1
Tj = 25°C
0.1
≤
60μs PULSE WIDTH
Tj = 150°C
0.1
1
10
100
10
100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 4.
Typical Output Characteristics
1000
Fig 5.
Typical Output Characteristics
1.6
ID = 16A
V GS = 10V
V GS = 4.5V
ID, Drain-to-Source Current (A)
100
Typical RDS(on) (Normalized)
T J = 150°C
T J = 25°C
T J = -40°C
1.4
1.2
10
1.0
1
VDS = 15V
≤60μs
PULSE WIDTH
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
0.8
0.1
0.6
-60 -40 -20 0
20 40 60 80 100 120 140 160
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 6.
Typical Transfer Characteristics
10000
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
Fig 7.
Normalized On-Resistance vs. Temperature
35.0
30.0
Typical RDS(on) ( mΩ)
C, Capacitance(pF)
1000
Ciss
Coss
25.0
20.0
15.0
10.0
5.0
Vgs = 3.5V
Vgs = 4.5V
Vgs = 5.0V
Vgs = 7.0V
Vgs = 8.0V
Vgs = 10V
Vgs = 12V
Vgs = 15V
T J = 25°C
100
Crss
10
1
10
VDS, Drain-to-Source Voltage (V)
100
0.0
0
15
30
45
60
75
90 105 120 135
Fig 8.
Typical Capacitance vs.Drain-to-Source Voltage
Fig 9.
Typical On-Resistance vs.
Drain Current and Gate Voltage
ID, Drain Current (A)
4
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IRF6810STRPbF
1000
1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
100
1msec
10msec
100μsec
10
T J = 150°C
T J = 25°C
T J = -40°C
VGS = 0V
0.1
0.3
0.5
0.7
0.9
1.1
1.3
VSD, Source-to-Drain Voltage (V)
10
DC
1
1
Ta = 25°C
Tj = 150°C
Single Pulse
0.1
0.01
0.1
1
10
100
VDS , Drain-toSource Voltage (V)
Fig 10.
Typical Source-Drain Diode Forward Voltage
60
Fig 11.
Maximum Safe Operating Area
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
-75 -50 -25
0
25
50
75 100 125 150
T J , Temperature ( °C )
ID = 25μA
50
ID, Drain Current (A)
40
30
20
10
0
25
50
75
100
125
150
T C , Case Temperature (°C)
Fig 12.
Maximum Drain Current vs. Case Temperature
220
EAS , Single Pulse Avalanche Energy (mJ)
200
180
160
140
120
100
80
60
40
20
0
25
50
75
ID
TOP
1.6A
2.4A
BOTTOM 13A
100
Typical VGS(th) Gate threshold Voltage (V)
Fig 13.
Typical Threshold Voltage vs. Junction
Temperature
125
150
Starting T J , Junction Temperature (°C)
Fig 14.
Maximum Avalanche Energy vs. Drain Current
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