ZM7300G Series Digital Power Manager
Data Sheet
Member of the
Features
Family
Applications
Low voltage, high density systems utilizing
Z-One
TM
Digital Intermediate Bus Architectures
Broadband, networking, optical, and wireless
communications systems
Industrial computing, servers, and storage
applications
Benefits
Eliminates the need for external power
management components
Communicates with the host system via the
industry standard I
2
C communication bus
Reduces board space, system cost, complexity,
and time to market
RoHS compliant for all six substances
Compatible with both lead-free and standard reflow
processes
Programs, controls, and manages up to 32
independent Z-series POL converters via an industry
standard I
2
C interface (both 100kHz and 400kHz)
JTAG IEEE 1149.1 compliant programming interface
Controls and monitors industry standard power
supplies and other peripheral devices (fans, etc)
Programs output voltage, protections, optimal voltage
positioning, turn-on and turn-off delays and slew
rates, switching frequency, interleave (phase shift),
and feedback loop compensation of the Z-One
TM
POL
converters
User friendly GUI interface for programming,
monitoring, and performance simulation
Four independent OK lines for flexible fault
management and fast fault propagation
Four interrupt inputs with programmable hot swap
support capabilities
Intermediate bus voltage monitoring and protection
AC Fail input
Non-volatile memory to store system configuration
information and status data
1 kByte of user accessible non-volatile memory
Control of industry standard DC-DC front ends
Crowbar output to trigger the optional crowbar
protection
Run-time counter
Hardware and software locks for data protection
Small footprint semiconductor industry standard
QFN64 package: 9x9mm
Wide industrial operating temperature range
Description
Power-One’s point-of-load converters are recommended for use with regulated bus converters in an Intermediate
Bus Architecture (IBA). T
he ZM7300 is a fully programmable digital power manager that utilizes the
industry-standard I
2
C communication bus interface to control, manage, program and monitor up to 32 Z-
series POL converters and 4 independent power devices. The ZM7300 completely eliminates the need
for external components for power management and programming and monitoring of the Z-One
TM
POL
converters and other industry standard power and peripheral devices. Parameters of the ZM7300 are
programmable via the I
2
C bus and can be changed by a user at any time during product development
and deployment.
ZD-00896 Rev. 5.1, 13-Jul-10
www.power-one.com
Page 1 of 33
ZM7300G Series Digital Power Manager
Data Sheet
1
Selection Chart
DPM Type
Number of Z-One
TM
POLs
and Auxiliary devices that
can be controlled
4
8
16
32
Active
Addresses
00…03
00…07
00…15
00…31
Number of
Groups
2
2
3
4
Number of
Interrupts
2
2
3
4
Number of
Parallel
Buses
2
4
4
8
Number of
Auxiliary
Devices
4
4
4
4
ZM7304G
ZM7308G
ZM7316G
ZM7332G
2
Ordering Information
73
Series:
Digital
Power
Manager
xx
Number of Z-
TM
One POLs and
Auxiliary devices:
04
– 4 devices
08
– 8 devices
16
– 16 devices
32
– 32 devices
G
RoHS compliance:
G
- RoHS compliant
for all six substances
–
yyyyy
–
zz
Packaging Option
1)
:
5-digit identifier
B1
– 50pcs Tube
assigned by
B2
– 10pcs Tube
Power-One for
T1
– 500pcs T&R
each unique
T2
– 100pcs T&R
configuration file
Q1
– 1pc sample for
evaluation only
ZM
Product
family:
Z-One Power
Management
Devices
______________________________________
1
2
Packaging option is used only for ordering and not included in the part number printed on the DPM label.
The evaluation board is available in only one configuration: ZM7300-KIT-HKS
Example:
ZM7316G-12345-T1:
A 500-piece reel of 16-node DPMs with preloaded configuration file code 12345.
Each DPM is labeled ZM7316G-12345. Refer to Figure 1 for label marking information.
Line 1 : Part Number
ZM7316G
(7 Char. Alpha Numeric)
(3 Char. Alpha Numeric)
A03
Line 3 : Firmware Rev.
ZM73xxG
xxxxx x
xxx
xxxxxxx
Line 2 : Customer Config. Number,
Customer Config. Rev.
(5 digits Plus Rev Letter)
12345 A
Line 4 : Programming
(Location, Date, Batch Code)
(7 Char. Alpha Numeric)
M082703
Figure 1. Label Drawing
3
Standard 5-Digit Identifiers
DPM Type
ZM7304G
ZM7308G
ZM7316G
ZM7332G
DPM preloaded with default
configuration file
65501
65502
65503
65504
DPM configured for JTAG
programming
65505
65506
65507
65508
Packaging Options
B1, B2, T1, T2, Q1
B1, B2, T1, T2, Q1
B1, B2, T1, T2, Q1
B1, B2, T1, T2, Q1
ZD-00896 Rev. 5.1, 13-Jul-10
www.power-one.com
Page 2 of 33
ZM7300G Series Digital Power Manager
Data Sheet
4
Reference Documents
ZY7XXX Point of Load Regulator. Data Sheet
ZM7300 Digital Power Manager. Programming Manual, Revision A09 or later
Graphical User Interface, Revision 6.3.5 or later
Programming ZM7300 DPMs via JTAG Interface. Application Note
ZM00056-KIT USB to I
2
C Adapter Kit. User Manual
5
Absolute Maximum Ratings
Stresses beyond those listed may cause permanent damage to the DPM. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability. Functional operation of
the DPM at absolute maximum ratings or conditions beyond those indicated in the operational sections
of this specification is not implied.
Parameter
Ambient Temperature Range
Storage Temperature (Ts)
Junction Temperature (T
J
)
Input Voltage
Input Voltage
Pin Current
VDD pin
Any pin other than VDD
DC
-0.3
-0.5
Conditions/Description
Min
-40
-55
Max
85
150
125
3.6
VDD+0.5
40
Units
C
C
C
VDC
VDC
mA
6
Mechanical Specifications
Parameter
Peak Reflow Temperature
Lead Plating
Moisture Sensitivity Level
JEDEC J-STD-020C
Conditions/Description
40 sec maximum duration
100% matte tin
3
Min
Nom
Max
260
Units
C
7
Reliability Specifications
Parameter
Failure Rate
Non-Volatile Memory Endurance
Conditions/Description
Demonstrated at 55C,
60% Confidence Level
-40°C to 85°C ambient
Min
2.26
10,000
Nom
Max
Units
FIT
Read-
Write
cycles
ZD-00896 Rev. 5.1, 13-Jul-10
www.power-one.com
Page 3 of 33
ZM7300G Series Digital Power Manager
Data Sheet
8
Electrical Specifications
Specifications apply at VDD from 3V to 3.6V, ambient temperature from -40°C to 85°C, and utilizing
proper decoupling as shown in Figure 3 unless otherwise noted.
8.1
Power Specifications
Parameter
Input Supply Voltage
Undervoltage Lockout
Input Supply Current
VREF voltage
IBVS input voltage range
IBVS input resistance
Conditions/Description
VDD pin
Hardware reset is triggered below this
threshold
VDD pin=3.3V
AREF pin
2.3
GND
100
Min
3.0
2.3
2.5
12
2.56
Nom
Max
3.6
2.7
20
2.7
VREF
Units
VDC
VDC
mA
VDC
VDC
MΩ
8.2
Feature Specifications
Parameter
Overvoltage Protection
Threshold
Undervoltage Protection
Threshold
Threshold Hysteresis
Accuracy of Protection
Thresholds
Conditions/Description
Min
Nom
Max
Units
Intermediate Voltage Bus Protections
With external 5.7:1 ratio divider
With external 5.7:1 ratio divider
With external 5.7; 1ratio divider.
Symmetrical relative to average
threshold value
Internal voltage reference, 1% resistive
divider
With external 5.7:1 ratio divider
Front End Enable (FE_EN)
V
FE_EN
V
FE_EN
Isrc
Isink
Front End logic level enabled
Front End logic level disabled
Source Current, V
FE_EN
=V
DD
-0.5V
Sink Current, V
FE_EN
=0.5V
Crowbar (CB)
V
CB
V
CB
Isrc
Isink
T
CB
Crowbar Enable
Crowbar Disable
Source Current, V
CB
=V
DD
-0.5V
Sink Current, V
CB
=0.5V
Duration of Enabling Pulse
5
5
1
High
Low
mA
mA
ms
5
5
High
Low
mA
mA
IBV
0
±114
-10
-43
10
43
14.6
IBV
V
V
mV
%V
TH
mV
Internal ADC Conversion Error
ZD-00896 Rev. 5.1, 13-Jul-10
www.power-one.com
Page 4 of 33
ZM7300G Series Digital Power Manager
Data Sheet
8.3
Signal Specifications
Parameter
SDpu
SDthrL
SDthrH
SDhys
SDsink
Freq_sd
Tsynq
T0
Rpu3
VthrL3
VthrH3
Vhys3
Rpu1
VthrL1
VthrH1
Rpu2
VthrL2
VthrH2
OKpu
OKthrL
OKthrH
OKhys
OKsink
V
EN
V
EN
V
EN
H
V
EN
L
Conditions/Description
SYNC/DATA Line
SD pull up resistor
SD input low voltage threshold
SD input high voltage threshold
SD input hysteresis
SD sink capability (V
SD
=0.5V)
Clock frequency
Sync pulse duration
Data=0 pulse duration
Pull up resistor
Input low voltage threshold
Input high voltage threshold
Input hysteresis
Pull up resistor
Input low voltage
Input high voltage
5
0.31·VDD
0.45·VDD
0.37
450
22
72
30
0.31·VDD
0.45·VDD
0.37
20
-0.5
0.7·VDD
0.52·VDD
0.81·VDD
1.1
50
0.2·VDD
VDD+0.5
60
0.2·VDD
VDD+0.5
5
0.31·VDD
0.45·VDD
0.37
0.52·VDD
0.81·VDD
1.1
30
High
Low
VDD-0.6
0.5
V
V
0.52·VDD
0.81·VDD
1.1
30
550
28
78
kΩ
V
V
V
mA
kHz
% of clock
cycle
% of clock
cycle
kΩ
V
V
V
kΩ
V
V
kΩ
V
V
kΩ
V
V
V
mA
Min
Nom
Max
Units
Interrupt Inputs (INT_N[3:0])
ADDR[3:0], ACFAIL_N, RES_N, LCK_N, PG[3:0] Inputs
HRES_N Input
HRES_N pull up resistor (with series
30
diode, see note 1)
HRES_N input low voltage
-0.5
HRES_N input high voltage
0.9·VDD
Inputs/Outputs (OK_A, OK_B, OK_C, OK_D)
OK pull up resistor
OK input low voltage threshold
OK input high voltage threshold
OK input hysteresis
OK sink capability (V
OK
=0.5V)
EN logic level enabled
EN logic level disabled
EN output high voltage
I
OH
= -10 mA
EN output low voltage
I
OL
= 5 mA
Enable Outputs (EN[3:0])
______________________________________
1
HRES_N Input - Because the input does not have an internal ESD protection diode connected to VDD, the user needs to add an external
diode between the HRES_N and VDD pins as shown in Figure 3.
ZD-00896 Rev. 5.1, 13-Jul-10
www.power-one.com
Page 5 of 33
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