551MLNT datasheet, PDF - EEWORLD Datasheet

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551MLNT: DescriptionSOIC-8, Reel; Categorylogic logic; File Size311KB，10 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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551MLNT Overview

SOIC-8, Reel

551MLNT Parametric

Parameter Name	Attribute value
Brand Name	Integrated Device Technology
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
Parts packaging code	SOIC
package instruction	SOP, SOP8,.25
Contacts	8
Manufacturer packaging code	DCG8
Reach Compliance Code	unknown
ECCN code	EAR99
series	551
Input adjustment	STANDARD
JESD-30 code	R-PDSO-G8
JESD-609 code	e3
length	4.9 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER
MaximumI(ol)	0.035 A
Humidity sensitivity level	1
Number of functions	1
Number of inverted outputs
Number of terminals	8
Actual output times	4
Maximum operating temperature	70 °C
Minimum operating temperature
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP8,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
power supply	3.3/5 V
Prop。Delay @ Nom-Sup	8 ns
propagation delay (tpd)	8 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.25 ns
Maximum seat height	1.75 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	3.9 mm
minfmax	160 MHz

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DATASHEET

1 TO 4 CLOCK BUFFER

Description

The ICS551 is a low cost, high-speed single input to

four output clock buffer. Part of IDT’s ClockBlocks

family, this is our lowest cost, small clock buffer.

See the ICS552-02B for monolithic dual version of the

ICS551 in a 20 pin QSOP.

IDT makes many non-PLL and PLL based low skew

output devices as well as Zero Delay Buffers to

synchronize clocks. Contact IDT for all of your clocking

needs.

ICS551

Features

•

Low skew (250 ps) outputs

Pb-free packaging

Low cost clock buffer

Packaged in 8-pin SOIC

Input/Output clock frequency up to 160 MHz

Non-inverting output clock

Ideal for networking clocks

Operating Voltages of 3.3 and 5.0 V

Output Enable mode tri-states outputs

Advanced, low power CMOS process

Commercial and industrial temperature versions

Block Diagram

ICLK

Output Enable

IDT™

1 TO 4 CLOCK BUFFER

ICS551

REV P 051310

551MLNT Related Products

	551MLNT	551MLF	551MILFT	551MLN
Description	SOIC-8, Reel	SOIC-8, Tube	SOIC-8, Reel	SOIC-8, Tube
Brand Name	Integrated Device Technology	Integrated Device Technology	Integrated Device Technology	Integrated Device Technology
Is it lead-free?	Lead free	Lead free	Lead free	Lead free
Is it Rohs certified?	conform to	conform to	conform to	conform to
Parts packaging code	SOIC	SOIC	SOIC	SOIC
package instruction	SOP, SOP8,.25	SOP, SOP8,.25	SOP, SOP8,.25	SOP, SOP8,.25
Contacts	8	8	8	8
Manufacturer packaging code	DCG8	DCG8	DCG8	DCG8
Reach Compliance Code	unknown	compli	compliant	unknown
ECCN code	EAR99	EAR99	EAR99	EAR99
series	551	551	551	551
Input adjustment	STANDARD	STANDARD	STANDARD	STANDARD
JESD-30 code	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8
JESD-609 code	e3	e3	e3	e3
length	4.9 mm	4.9 mm	4.9 mm	4.9 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER
MaximumI(ol)	0.035 A	0.035 A	0.035 A	0.035 A
Humidity sensitivity level	1	1	1	1
Number of functions	1	1	1	1
Number of terminals	8	8	8	8
Actual output times	4	4	4	4
Maximum operating temperature	70 °C	70 °C	85 °C	70 °C
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	SOP	SOP	SOP
Encapsulate equivalent code	SOP8,.25	SOP8,.25	SOP8,.25	SOP8,.25
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260	NOT SPECIFIED	NOT SPECIFIED	260
power supply	3.3/5 V	3.3/5 V	3.3/5 V	3.3/5 V
propagation delay (tpd)	8 ns	8 ns	8 ns	8 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Same Edge Skew-Max（tskwd）	0.25 ns	0.25 ns	0.25 ns	0.25 ns
Maximum seat height	1.75 mm	1.75 mm	1.75 mm	1.75 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	3 V	3 V	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	INDUSTRIAL	COMMERCIAL
Terminal surface	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	30	NOT SPECIFIED	NOT SPECIFIED	30
width	3.9 mm	3.9 mm	3.9 mm	3.9 mm
minfmax	160 MHz	160 MHz	160 MHz	160 MHz
Prop。Delay @ Nom-Sup	8 ns	-	8 ns	8 ns
Base Number Matches	-	1	1	1

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