FINAL
Am79C30A/32A
Digital Subscriber Controller™ (DSC™) Circuit
DISTINCTIVE CHARACTERISTICS
s
Combines CCITT I.430 S/T-Interface Transceiver,
D-Channel LAPD Processor, Audio
s
Processor (DSC device only), and IOM-2
Interface in a single chip
s
Special operating modes allow realization of
CCITT I.430 power-compliant terminal
equipment
s
S- or T-Interface Transceiver
— Level 1 Physical Layer Controller
— Supports point-to-point, short and extended
passive bus configurations
— Provides multiframe support
s
Certified protocol software support available
s
CMOS technology, TTL compatible
s
D-channel processing capability
— Flag generation/detection
— CRC generation/checking
— Zero insertion/deletion
— Four 2-byte address detectors
— 32-byte receive and 16-byte transmit FIFOs
BLOCK DIAGRAM
SBP/IOM-2 Interface
CAP1
CAP2
SBIN
SCLK BCL/CH2STRB*
SBIOUT
SFS
HSW
AINA
AREF
AINB
EAR1
EAR2
LS1
LS2
Audio Interface
Main Audio
Processor (MAP)
(Am79C30A
Only)
Peripheral Port
(PP)
S/T Line
Interface Unit
(LIU)
D
Channel
B1
LOUT1
LOUT2
LIN1
LIN2
Bd Be Bf
Ba
B-channel Multiplexer
(MUX)
B2
D-Channel Data
Link Controller
(DLC)
XTAL1
XTAL2
MCLK
Oscillator
(OSC)
Bb
Bc
D
Channel
CS
WR
RD
Microprocessor Interface
(MUX)
RESET
D7 D6 D5 D4 D3 D2 D1 D0 INT A2
Microprocessor Interface
A1 A0
09893H-1
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Publication# 09893 Rev: H Amendment/0
Issue Date: December 1998
S/T Interface
DISTINCTIVE CHARACTERISTICS (continued)
s
Audio processing capability (DSC circuit only)
— Registers for implementation of software-based
speaker phone algorithms
— Dual audio inputs
— Earpiece and loudspeaker drivers
— Codec/filter with A/µ selection
— Programmable gain and equalization filters
— Programmable sidetone level
— Programmable DTMF, single tone, progress
tone, and ringer tone generation
— Programmable on-chip microphone amplifier
s
Pin and software compatible with the
Am79C32A ISDN Data Controller (IDC™) Circuit.
The Am79C32A is used in data-only
applications.
GENERAL DESCRIPTION
The Am79C30A Digital Subscriber Controller (DSC)
Circuit and Am79C32A ISDN Data Controller (IDC) Cir-
cuit, shown in the Block Diagram, allow the realization
of highly-integrated Terminal Equipment for the ISDN.
The Am79C30A/32A is fully compatible with the
CCITT-I-series recommendations for the S and T refer-
ence points, ensuring that the user of the device may
design TEs which conform to the international stan-
dards.
The Am79C30A/32A provides a 192-Kbit/s full duplex
digital path over four wires between the TE located on
the subscriber's premises and the NT or PABX line-
card. All physical layer functions and procedures are
implemented in accordance with CCITT Recommen-
dation I.430, including framing, synchronization, main-
tenance, and multiple ter minal contention. Both
point-to-point and point-to-multipoint configurations are
supported.
The Am79C30A/32A processes the ISDN basic rate bit
stream, which consists of B1 (64 Kbit/s), B2 (64 Kbit/s),
and D (16 Kbit/s) channels. The B channels are routed
to and from different sections of the Am79C30A/32A
under software control. The D channel is partially pro-
cessed by the DSC/IDC circuit and is passed to the mi-
croprocessor for further processing.
The Main Audio Processor (MAP) uses Digital Signal
Processing (DSP) to implement a high performance
codec/filter function. The MAP interface supports a
loudspeaker, an earpiece, and two separate audio in-
puts. Programmable on-chip gain is provided to sim-
plify use of low output level microphones. The user may
alter frequency response and gain of the MAP receive
and transmit paths. Tone generators are included to im-
plement ringing, call progress, and DTMF signals.
A Peripheral Port (PP) is provided to allow the B chan-
nels to be routed off-chip for processing by other pe-
ripherals. This por t is configurable as either an
industry-standard IOM-2 port, or as a serial bus port
(SBP).
The TE design process is simplified by the availability
of certified protocol software packages, which provide
complete system solutions through OSI Layer 3.
2
Am79C30A/32A Data Sheet
ORDERING INFORMATION
Standard Products
AMD
®
standard products are available in several packages and operating ranges. The order number (Valid Combination) is
formed by a combination of the elements below.
AM79C30A/32A
J
C
OPTIONAL PROCESSING
Blank = Standard Processing
TEMPERATURE RANGE
C = Commercial (0°C to +70°C)
PACKAGE TYPE
J = 44-Pin Plastic Leaded Chip Carrier (PL 044)
V = 44-Pin Thin Plastic Quad Flat Pack (PQT044)
SPEED OPTION
Not Applicable
DEVICE NAME/DESCRIPTION
Am79C30A/32A
Digital Subscriber Controller (DSC) device
ISDN Data Controller (IDC) device
Valid Combinations
AM79C30A
AM79C32A
JC, VC
JC, VC
Valid Combinations
Valid Combinations list configurations planned to be sup-
ported in volume for this device. Consult the local AMD sales
office to confirm availability of specific valid combinations and
to check on newly released combinations.
Reference Appendix C, Figures 1 & 2, for specific mechanical dimensions of the two packages.
Am79C30A/32A Data Sheet
5
京公网安备 11010802033920号
EEWORLD
