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276G-XXLFT

Description
Clock Generator, 200MHz, CMOS, PDSO16, 0.173 INCH, ROHS COMPLIANT, TSSOP-16
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size159KB,10 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
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276G-XXLFT Overview

Clock Generator, 200MHz, CMOS, PDSO16, 0.173 INCH, ROHS COMPLIANT, TSSOP-16

276G-XXLFT Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeTSSOP
package instructionTSSOP,
Contacts16
Reach Compliance Codecompli
ECCN codeEAR99
JESD-30 codeR-PDSO-G16
JESD-609 codee3
length5 mm
Number of terminals16
Maximum operating temperature70 °C
Minimum operating temperature
Maximum output clock frequency200 MHz
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Master clock/crystal nominal frequency27 MHz
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage3.465 V
Minimum supply voltage3.135 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width4.4 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, OTHER
Base Number Matches1
DATASHEET
TRIPLE PLL FIELD PROGRAMMABLE VCXO CLOCK SYNTHESIZER
Description
The ICS276 field programmable VCXO clock synthesizer
generates up to three high-quality, high-frequency clock
outputs including multiple reference clocks from a
low-frequency crystal input. It is designed to replace
crystals and crystal oscillators in most electronic systems.
Using IDT’s VersaClock
TM
software to configure PLLs and
outputs, the ICS276 contains a One-Time Programmable
(OTP) ROM for field programmability. Programming
features include VCXO and eight selectable configuration
registers.
Each of the outputs are powered by a single VDDO voltage.
VDDO may vary from 1.8 V to VDD.
Using Phase-Locked Loop (PLL) techniques, the device
runs from a standard fundamental mode, inexpensive
crystal, or clock. It can replace VCXOs, multiple crystals
and oscillators, saving board space and cost.
The ICS276 is also available in factory programmed custom
versions for high-volume applications.
ICS276
Features
Packaged as 16-pin TSSOP – Pb-free, RoHS compliant
Eight addressable registers
Replaces multiple crystals and oscillators
Output frequencies up to 200 MHz at 3.3 V
Input crystal frequency of 5 to 27 MHz
Up to three reference outputs
Operating voltages of 3.3 V
VDDO output control from 1.8 V to 3.3 V
Controllable output drive levels
Advanced, low-power CMOS process
Block Diagram
VDD
3
VDDO
S2:S0
3
OTP
ROM
with
PLL
Values
PLL1
CLK1
PLL2
Divide
Logic
and
Output
Enable
Control
CLK2
VIN
PLL3
X1
Crystal
X2
External capacitors
are required.
Voltage
Controlled
Crystal
Oscillator
GND
2
CLK3
PDTS
IDT™ / ICS™
TRIPLE PLL FIELD PROGRAMMABLE VCXO CLOCK SYNTHESIZER 1
ICS276
REV E 051310

276G-XXLFT Related Products

276G-XXLFT 276GI-XXLF 276GI-XXLFT 276G-XXLF
Description Clock Generator, 200MHz, CMOS, PDSO16, 0.173 INCH, ROHS COMPLIANT, TSSOP-16 Clock Generator, 200MHz, CMOS, PDSO16, 0.173 INCH, ROHS COMPLIANT, TSSOP-16 Clock Generator, 200MHz, CMOS, PDSO16, 0.173 INCH, ROHS COMPLIANT, TSSOP-16 Clock Generator, 200MHz, CMOS, PDSO16, 0.173 INCH, ROHS COMPLIANT, TSSOP-16
Is it lead-free? Lead free Lead free Lead free Lead free
Is it Rohs certified? conform to conform to conform to conform to
Parts packaging code TSSOP TSSOP TSSOP TSSOP
package instruction TSSOP, TSSOP, TSSOP, TSSOP,
Contacts 16 16 16 16
Reach Compliance Code compli compli compli compli
ECCN code EAR99 EAR99 EAR99 EAR99
JESD-30 code R-PDSO-G16 R-PDSO-G16 R-PDSO-G16 R-PDSO-G16
JESD-609 code e3 e3 e3 e3
length 5 mm 5 mm 5 mm 5 mm
Number of terminals 16 16 16 16
Maximum operating temperature 70 °C 85 °C 85 °C 70 °C
Maximum output clock frequency 200 MHz 200 MHz 200 MHz 200 MHz
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP TSSOP TSSOP TSSOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Master clock/crystal nominal frequency 27 MHz 27 MHz 27 MHz 27 MHz
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.2 mm 1.2 mm 1.2 mm 1.2 mm
Maximum supply voltage 3.465 V 3.465 V 3.465 V 3.465 V
Minimum supply voltage 3.135 V 3.135 V 3.135 V 3.135 V
Nominal supply voltage 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES
technology CMOS CMOS CMOS CMOS
Temperature level COMMERCIAL INDUSTRIAL INDUSTRIAL COMMERCIAL
Terminal surface Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn)
Terminal form GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.65 mm 0.65 mm 0.65 mm 0.65 mm
Terminal location DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 4.4 mm 4.4 mm 4.4 mm 4.4 mm
uPs/uCs/peripheral integrated circuit type CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER
Base Number Matches 1 1 1 1
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