21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT373T
PI74FCT573T
Octal Transparent Latches
Fast CMOS Octal
Transparent Latches
Features:
• PI74FCT373/573T are pin compatible with bipolar FAST™
Series at a higher speed and lower power consumption
• TTL input and output levels
• Low ground bounce outputs
• Extremely low static power
• Hysteresis on all inputs
• Industrial operating temperature range: –40°C to +85°C
• Device models available upon request
• Packaging:
– 20-pin TSSOP (L)
– 20-pin SSOP (H)
– 20-pin QSOP (Q)
– 20-pin SOIC (S)
Description:
Pericom Semiconductor’s PI74FCT373T and PI74FCT 573T are
8-bit wide octal transparent latches designed with 3-state outputs
and are intended for bus oriented applications. When Latch Enable
(LE) is HIGH, the flip-flops appear transparent to the data. The data
that meets the set-up time when LE is LOW is latched. When OE is
HIGH, the bus output is in the high impedance state.
Block Diagram
D
0
D
O
G
G
D
1
D
O
G
D
2
D
O
G
D
3
D
O
G
D
4
D
O
G
D
5
D
O
G
D
6
D
O
G
D
7
D
O
LE
OE
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
1
PS2015B
10/06/04
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT373T
PI74FCT573T
OCTAL TRANSPARENT LATCHES
PI74FCT373 Pin Configuration
OE
O
0
D
0
D
1
O
1
O
2
D
2
D
3
O
3
GND
1
20
2
19
3
18
20-PIN
4
L20
17
5
P20
16
6
Q20
15
S20
14
7
8
13
9
12
10
11
Pin Description
Vcc
O
7
D
7
D
6
O
6
O
5
D
5
D
4
O
4
LE
Pin Name
OE
LE
D
0
-D
7
O
0
-O
7
O
0
-O
7
GND
V
CC
Description
Output Enable Input (Active LOW)
Latch Enable Input (Active HIGH)
Data Inputs
3-State Outputs
Complementary 3-State Outputs
Ground
Power
Inputs
LE
H
H
X
Outputs
O
N
H
L
Z
Truth Table
(1)
D
N
H
L
X
1.
PI74FCT573 Pin Configuration
OE
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
GND
1
20
2
19
20-PIN
18
3
L20
4
17
P20
5
16
Q20
6
15
S20
7
14
8
13
9
12
10
11
OE
L
L
H
Vcc
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
LE
H = High Voltage Level
L = Low Voltage Level
X = Don’t Care
Z = High Impedance
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PS2015B
10/06/04
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT373T
PI74FCT573T
OCTAL TRANSPARENT LATCHES
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ................................................................. –65°C to +150°C
Ambient Temperature with Power Applied ................................. -40°C to +85°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) .......... –0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) ....... –0.5V to +7.0V
DC Input Voltage ......................................................................... –0.5V to +7.0V
DC Output Current ................................................................................... 120 mA
Power Dissipation ......................................................................................... 0.5W
Note:
Stresses greater than those listed under MAXI-
MUM RATINGS may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at these or any other
conditions above those indicated in the operational
sections of this specification is not implied.
Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
DC Electrical Characteristics
(Over the Operating Range, T
A
= –40°C to +85°C, V
CC
= 5.0V ± 5%)
Parameters Description
V
OH
V
OL
V
OL
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
I
OFF
I
OS
V
H
Output HIGH Voltage
Output LOW Current
Output LOW Current
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
High Impedance
Output Current
Clamp Diode Voltage
Power Down Disable
Short Circuit Current
Input Hysteresis
V
CC
= Min., I
IN
= –18 mA
V
CC
= GND, V
OUT
= 4.5V
V
CC
= Max.
(3)
, V
OUT
= GND
—
–60
Test Conditions
(1)
V
CC
= Min., V
IN
= V
IH
or V
IL
V
CC
= Min., V
IN
= V
IH
or V
IL
V
CC
= Min., V
IN
= V
IH
or V
IL
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
CC
= Max.
V
CC
= M
AX
.
V
IN
= V
CC
V
IN
= GND
V
OUT
= 2.7V
V
OUT
= 0.5V
–0.7
—
–120
200
I
OH
= –15.0 mA
I
OL
= 64 mA
I
OL
= 12 mA (25Ω Series)
2.0
0.8
1
–1
1
–1
–1.2
100
Min. Typ
(2)
Max. Units
2.4
3.0
0.3
0.3
0.55
0.50
V
V
V
V
V
µA
µA
µA
µA
V
µA
mA
mV
Capacitance
(T
A
= 25°C, f = 1 MHz)
Parameters
(4)
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
Test Conditions
V
IN
= 0V
V
OUT
= 0V
Typ
6
8
Max.
10
12
Units
pF
pF
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is determined by device characterization but is not production tested.
3
PS2015B
10/06/04
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT373T
PI74FCT573T
OCTAL TRANSPARENT LATCHES
Power Supply Characteristics
Parameters Description
I
CC
∆I
CC
I
CCD
Quiescent Power
Supply Current
Supply Current per
Input @ TTL HIGH
Supply Current per
Input per MHz
(4)
V
CC
= Max.
V
CC
= Max.,
V
CC
= Max.,
Outputs Open
OE = GND
LE = V
CC
One Bit Toggling
50% Duty Cycle
V
CC
= Max.,
Outputs Open
f
I
= 10 MH
Z
50% Duty Cycle
OE = GND
LE = V
CC
One Bit Toggling
V
CC
= Max.,
Outputs Open
f
I
= 2.5 MH
Z
50% Duty Cycle
OE = GND
LE = V
CC
Eight Bits Toggling
Test Conditions
(1)
V
IN
= GND or V
CC
V
IN
= 3.4V
(3)
V
IN
= V
CC
V
IN
= GND
Min.
Typ
(2)
0.1
0.5
0.15
Max.
500
2.0
0.25
Units
µA
mA
mA/
MHz
I
C
Total Power Supply
Current
(6)
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
1.5
3.0
(5)
mA
1.8
4.5
(5)
3.0
6.0
(5)
5.0
14.0
(5)
Notes:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at Vcc or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.
6. I
C
=I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
I
Ni)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
I
= Input Frequency
N
I
= Number of Inputs at f
I
All currents are in milliamps and all frequencies are in megahertz.
4
PS2015B
10/06/04
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT373T
PI74FCT573T
OCTAL TRANSPARENT LATCHES
PI74FCT373T Switching Characteristics over Operating Range
373T
Com.
373AT
Com.
Max
Min
Max
Min
373CT
Com.
Max
Min
373DT
Com.
Max
Unit
Parameters
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SU
t
H
t
W
Description
Propagation Delay
D
N
to O
N
Propagation Delay
LE to O
N
Output Enable Time
OE to O
N
Output Disable Time
(3)
OE to O
N
Setup Time HIGH or
LOW, D
N
to LE
Hold Time HIGH or
LOW, D
N
to LE
LE Pulse Width
(3)
HIGH
Conditions
(1)
C
L
= 50 pF
R
L
= 500Ω
Min
1.5
2.0
1.5
1.5
2.0
1.5
6.0
8.0
13.0
12.0
7.5
—
—
—
1.5
2.0
1.5
1.5
2.0
1.5
5.0
5.2
8.5
6.5
5.5
—
—
—
1.5
2.0
1.5
1.5
2.0
1.5
5.0
4.2
5.5
5.5
5.0
—
—
—
1.5
1.5
1.5
1.5
2.0
1.5
4.0
3.8
4.9
5.5
5.0
—
—
—
ns
ns
ns
ns
ns
ns
ns
PI74FCT573T Switching Characteristics over Operating Range
573T
Com.
573AT
Com.
Max
Min
Max
Min
573CT
Com.
Max
Min
573DT
Com.
Max
Unit
Parameters
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SU
t
H
t
W
Description
Propagation Delay
D
N
to O
N
Propagation Delay
LE to O
N
Output Enable Time
OE to O
N
Output Disable Time
(3)
OE to O
N
Setup Time HIGH or
LOW, D
N
to LE
Hold Time HIGH or
LOW, D
N
to LE
LE Pulse Width
(3)
HIGH
Conditions
(1)
C
L
= 50 pF
R
L
= 500Ω
Min
1.5
2.0
1.5
1.5
2.0
1.5
6.0
8.0
12.0
9.5
6.5
—
—
—
1.5
2.0
1.5
1.5
2.0
1.5
5.0
5.2
8.5
6.5
5.5
—
—
—
1.5
2.0
1.5
1.5
2.0
1.5
5.0
4.2
5.5
5.5
5.0
—
—
—
1.5
2.0
1.5
1.5
1.5
1.0
3.0
3.8
4.9
5.5
5.0
—
—
—
ns
ns
ns
ns
ns
ns
ns
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter guaranteed but not production tested.
5
PS2015B
10/06/04
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