74LVC1G332GN datasheet, PDF - EEWORLD Datasheet

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74LVC1G332GN: DescriptionOR Gate, LVC/LCX/Z Series, 1-Func, 3-Input, CMOS, PDSO6; Categorylogic logic; File Size202KB，18 Pages; ManufacturerNexperia; Websitehttps://www.nexperia.com; Environmental Compliance

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74LVC1G332GN Overview

OR Gate, LVC/LCX/Z Series, 1-Func, 3-Input, CMOS, PDSO6

74LVC1G332GN Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Nexperia
package instruction	SON,
Reach Compliance Code	compliant
series	LVC/LCX/Z
JESD-30 code	R-PDSO-N6
JESD-609 code	e3
length	1 mm
Logic integrated circuit type	OR GATE
Humidity sensitivity level	1
Number of functions	1
Number of entries	3
Number of terminals	6
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SON
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
propagation delay (tpd)	21.5 ns
Certification status	Not Qualified
Maximum seat height	0.35 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	1.65 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Tin (Sn)
Terminal form	NO LEAD
Terminal pitch	0.3 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	0.9 mm

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74LVC1G332

Single 3-input OR gate

Rev. 6 — 17 September 2015

Product data sheet

1. General description

The 74LVC1G332 provides one 3-input OR function.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these

devices as translators in mixed 3.3 V and 5 V applications.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall

time.

This device is fully specified for partial power-down applications using I

OFF

The I

OFF

circuitry disables the output, preventing the damaging backflow current through

the device when it is powered down.

2. Features and benefits



Wide supply voltage range from 1.65 V to 5.5 V



High noise immunity



Complies with JEDEC standard:



JESD8-7 (1.65 V to 1.95 V)



JESD8-5 (2.3 V to 2.7 V)



JESD8B/JESD36 (2.7 V to 3.6 V)



ESD protection:



HBM JESD22-A114F exceeds 2000 V



MM JESD22-A115-A exceeds 200 V



CDM JESD22-C101-C exceeds 1000 V



24

mA output drive (V

= 3.0 V)



CMOS low power consumption



Latch-up performance exceeds 250 mA



Direct interface with TTL levels



Inputs accept voltages up to 5 V



Multiple package options



Specified from

40 C

to +85

C

and

40 C

to +125

C

74LVC1G332GN Related Products

	74LVC1G332GN	74LVC1G332GM	74LVC1G332GF	74LVC1G332GS	74LVC1G332GW	74LVC1G332GV
Description	OR Gate, LVC/LCX/Z Series, 1-Func, 3-Input, CMOS, PDSO6	OR Gate, LVC/LCX/Z Series, 1-Func, 3-Input, CMOS, PDSO6	OR Gate, LVC/LCX/Z Series, 1-Func, 3-Input, CMOS, PDSO6	OR Gate, LVC/LCX/Z Series, 1-Func, 3-Input, CMOS, PDSO6	OR Gate, LVC/LCX/Z Series, 1-Func, 3-Input, CMOS, PDSO6	OR Gate, LVC/LCX/Z Series, 1-Func, 3-Input, CMOS, PDSO6
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to	conform to
package instruction	SON,	VSON,	VSON,	VSON,	TSSOP,	TSOP,
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant
series	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z
JESD-30 code	R-PDSO-N6	R-PDSO-N6	S-PDSO-N6	S-PDSO-N6	R-PDSO-G6	R-PDSO-G6
JESD-609 code	e3	e3	e3	e3	e3	e3
length	1 mm	1.45 mm	1 mm	1 mm	2 mm	2.9 mm
Logic integrated circuit type	OR GATE	OR GATE	OR GATE	OR GATE	OR GATE	OR GATE
Humidity sensitivity level	1	1	1	1	1	1
Number of functions	1	1	1	1	1	1
Number of entries	3	3	3	3	3	3
Number of terminals	6	6	6	6	6	6
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SON	VSON	VSON	VSON	TSSOP	TSOP
Package shape	RECTANGULAR	RECTANGULAR	SQUARE	SQUARE	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE, VERY THIN PROFILE	SMALL OUTLINE, VERY THIN PROFILE	SMALL OUTLINE, VERY THIN PROFILE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius)	260	260	260	260	260	260
propagation delay (tpd)	21.5 ns	21.5 ns	21.5 ns	21.5 ns	21.5 ns	21.5 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	0.35 mm	0.5 mm	0.5 mm	0.35 mm	1.1 mm	1.1 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	1.65 V	1.65 V	1.65 V	1.65 V	1.65 V	1.65 V
Nominal supply voltage (Vsup)	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V
surface mount	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
Terminal surface	Tin (Sn)	Tin (Sn)	Tin (Sn)	Tin (Sn)	Tin (Sn)	Tin (Sn)
Terminal form	NO LEAD	NO LEAD	NO LEAD	NO LEAD	GULL WING	GULL WING
Terminal pitch	0.3 mm	0.5 mm	0.35 mm	0.35 mm	0.65 mm	0.95 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	30	30	30	30	30	30
width	0.9 mm	1 mm	1 mm	1 mm	1.25 mm	1.5 mm
Maker	Nexperia	-	Nexperia	Nexperia	Nexperia	Nexperia

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