IBM25PPC750GXEAB6H42T datasheet, PDF

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IBM25PPC750GXEAB6H42T: DescriptionRISC Microprocessor, 32-Bit, 1000MHz, CMOS, CBGA292, 21 X 21 MM, 1 MM PITCH, CERAMIC, BGA-292; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1MB，74 Pages; ManufacturerIBM; Websitehttp://www.ibm.com

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IBM25PPC750GXEAB6H42T Overview

RISC Microprocessor, 32-Bit, 1000MHz, CMOS, CBGA292, 21 X 21 MM, 1 MM PITCH, CERAMIC, BGA-292

IBM25PPC750GXEAB6H42T Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	IBM
Parts packaging code	BGA
package instruction	21 X 21 MM, 1 MM PITCH, CERAMIC, BGA-292
Contacts	292
Reach Compliance Code	not_compliant
ECCN code	3A001.A.3
Address bus width	32
bit size	32
boundary scan	YES
maximum clock frequency	200 MHz
External data bus width	64
Format	FLOATING POINT
Integrated cache	YES
JESD-30 code	S-CBGA-B292
length	21 mm
low power mode	YES
Number of terminals	292
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	BGA
Encapsulate equivalent code	BGA292,20X20,40
Package shape	SQUARE
Package form	GRID ARRAY
power supply	1.8,2.5,3.3 V
Certification status	Not Qualified
Maximum seat height	3.137 mm
speed	1000 MHz
Maximum supply voltage	1.55 V
Minimum supply voltage	1.45 V
Nominal supply voltage	1.5 V
surface mount	YES
technology	CMOS
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
width	21 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC

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IBM PowerPC 750GX RISC Microprocessor

Revision Level DD1.X

Datasheet

Version: SA14-2765-02

September 2, 2005

Printed in the United States of America August 2005.

The following are trademarks of International Business Machines Corporation in the United States, or other countries,

or both.

IBM

IBM Logo

PowerPC

PowerPC Logo

PowerPC 750

PowerPC Architecture

IEEE is a registered trademark in the United States, owned by the Institute of Electrical and Electronics Engineers.

Other company, product and service names may be trademarks or service marks of others.

All information contained in this document is subject to change without notice. The products described in this document

are NOT intended for use in applications such as implantation, life support, or other hazardous uses where malfunction

could result in death, bodily injury, or catastrophic property damage. The information contained in this document does not

affect or change IBM product specifications or warranties. Nothing in this document shall operate as an express or implied

license or indemnity under the intellectual property rights of IBM or third parties. All information contained in this docu-

ment was obtained in specific environments, and is presented as an illustration. The results obtained in other operating

environments may vary.

Some of the information provided herein pertains to third party vendors and their products and services. You are directed

to contact such vendors with all questions pertaining to their respective products or services, as well as any requests for

product or service updates. You are solely responsible for the selection of any vendors, including their products and

services. The vendors identified herein are not agents or representatives of IBM and are not authorized to make commit-

ments, warranties or representations on behalf of IBM. IBM makes no commitments, warranties or representations with

regard to the vendors, their respective product or services, or the compatibility of such products or services with any of

IBM's product or services.

The information contained in this document is provided on an “AS IS” basis and no warranties of any kind, including but

not limited to the implied warranties of merchantability and fitness for a particular purpose, are provided. In no event will

IBM be liable to you or to any third parties for any damages arising directly or indirectly from any use of the information

contained in this document.

IBM Microelectronics Division

2070 Route 52, Bldg. 330

Hopewell Junction, NY 12533-6351

The IBM home page can be found at

ibm.com

The IBM Microelectronics Division home page can be found at

ibm.com/chips

750GX_ds_title.fm SA14-2765-02

September 2, 2005

Datasheet

IBM PowerPC 750GX RISC Microprocessor

DD1.X

List of Figures ................................................................................................................ 5

List of Tables .................................................................................................................. 7

1. General Information .................................................................................................... 9

1.1 Features ............................................................................................................................................ 9

1.2 Design Highlights ............................................................................................................................ 11

1.3 Processor Version Register ............................................................................................................ 11

1.4 Part Number Information ................................................................................................................. 12

2. Overview .................................................................................................................... 13

2.1 Block Diagram ................................................................................................................................. 13

2.2 General Parameters ........................................................................................................................ 14

3. Electrical and Thermal Characteristics ................................................................... 15

3.1 DC Electrical Characteristics ...........................................................................................................

3.2 AC Electrical Characteristics ...........................................................................................................

3.3 Clock AC Specifications ..................................................................................................................

3.4 Spread Spectrum Clock Generator .................................................................................................

3.4.1 Design Considerations ..........................................................................................................

3.5 60x Bus Input AC Specifications .....................................................................................................

3.5.1 Input Setup Timing ................................................................................................................

3.6 60x Bus Output AC Specifications ..................................................................................................

3.6.1 IEEE 1149.1 AC Timing Specifications .................................................................................

4. Dimensions and Signal Assignments ..................................................................... 29

4.1 Package ..........................................................................................................................................

4.1.1 Reduced-Lead package ........................................................................................................

4.1.1.1 Mechanical Specifications ..............................................................................................

4.1.1.2 Assembly Considerations ...............................................................................................

4.1.1.3 Board Layout Considerations .........................................................................................

4.2 Module Substrate Decoupling Voltage Assignments ......................................................................

4.3 Microprocessor Ball Placement .......................................................................................................

4.4 Pinout Listings .................................................................................................................................

5. System Design Information ..................................................................................... 46

5.1 Core Voltage Operation ..................................................................................................................

5.2 Low Voltage Operation at Lower Frequency ...................................................................................

5.2.1 Overview ................................................................................................................................

5.2.2 Restrictions and Considerations for PLL Configuration .........................................................

5.2.2.1 Configuration Restriction on Frequency Transitions ......................................................

5.2.3 PLL_RNG[0:1] Definitions for Dual PLL Operation ................................................................

5.2.4 PLL Configuration ..................................................................................................................

5.3 PLL Power Supply Filtering .............................................................................................................

5.4 Decoupling Recommendations .......................................................................................................

5.5 Connection Recommendations .......................................................................................................

750GX_dsTOC.fm SA14-2765-02

September 2, 2005

Page 3 of 73

Datasheet

IBM PowerPC 750GX RISC Microprocessor

DD1.X

5.6 Output Buffer DC Impedance ..........................................................................................................

5.6.1 Input/Output Usage ................................................................................................................

5.7 Thermal Management Information ..................................................................................................

5.7.1 Thermal Assist Unit ................................................................................................................

5.7.2 Minimum Heat Sink Requirements ........................................................................................

5.7.3 Internal Package Conduction Resistance ..............................................................................

5.7.4 Adhesives and Thermal Interface Materials ...........................................................................

5.8 Heat-Sink Selection Example ..........................................................................................................

5.9 Operational and Design Considerations ..........................................................................................

5.9.1 Level Protection .....................................................................................................................

5.9.2 64-Bit or 32-Bit Data Bus Mode .............................................................................................

5.9.3 I/O Voltage Mode Selection ...................................................................................................

5.9.4 QACK Signal Implementation for Selected Features .............................................................

5.9.4.1 Precharge Duration Selection and Application ...............................................................

5.9.4.2 Processor Debug System Enablement when Implementing Precharge Selection .........

Revision Log ................................................................................................................. 73

Page 4 of 73

750GX_dsTOC.fm SA14-2765-02

September 2, 2005

Datasheet

IBM PowerPC 750GX RISC Microprocessor

DD1.X

List of Figures

Figure 2-1.

Figure 3-1.

Figure 3-2.

Figure 3-3.

Figure 3-4.

Figure 3-5.

Figure 3-6.

Figure 3-7.

Figure 3-8.

Figure 3-9.

IBM PowerPC 750GX RISC Microprocessor Block Diagram ................................................. 13

SYSCLK Input Timing Diagram .............................................................................................. 18

Linear Sweep Modulation Profile ........................................................................................... 19

Input Timing Definition ........................................................................................................... 21

Input Timing Diagram ............................................................................................................. 21

Mode Select Input Timing Diagram ........................................................................................ 22

Output Valid Timing Definition ................................................................................................ 24

Output Timing Diagram for IBM PowerPC 750GX RISC Microprocessor .............................. 25

JTAG Clock Input Timing Diagram ......................................................................................... 27

TRST Timing Diagram ........................................................................................................... 27

Figure 3-10. Boundary-Scan Timing Diagram ............................................................................................ 27

Figure 3-11. Test Access Port Timing Diagram .......................................................................................... 28

Figure 4-1.

Figure 4-2.

Figure 4-3.

Figure 4-4.

Figure 5-1.

Figure 5-2.

Figure 5-3.

Figure 5-4.

Figure 5-5.

Figure 5-6.

Figure 5-7.

Figure 5-8.

Figure 5-9.

Mechanical Dimensions, Standard Package .......................................................................... 31

Mechanical Dimensions, ROHS-Compatible Package .......................................................... 33

Module Substrate Decoupling Voltage Assignments ............................................................. 35

PowerPC 750GX Microprocessor Ball Placement ................................................................. 36

Single PLL Power Supply Filter Circuit with A1VDD Pin and A2VDD Pin Tied to GND ......... 51

PLL Power Supply Filter Circuit with Two AVDD Pins and One Ferrite Bead ........................ 51

Dual PLL Power Supply Filter Circuits ................................................................................... 52

Orientation and Layout of the 750GX Decoupling Capacitors ............................................... 54

Driver Impedance Measurement ............................................................................................ 55

IBM RISCWatch JTAG to HRESET, TRST, and SRESET Signal Connector ........................ 61

Package Exploded Cross-Sectional View with Several Heat-Sink Options ........................... 62

C4 Package with Heat Sink Mounted to a Printed-Circuit Board ........................................... 65

Thermal Performance of Select Thermal Interface Material .................................................. 66

Figure 5-10. Example of a Pin-Fin Heat-Sink-to-Ambient Thermal Resistance versus Airflow Velocity .... 68

750GX_dsLOF.fm SA14-2765-02

September 2, 2005

List of Figures

Page 5 of 73

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