MC74VHC1GT86DFT1G datasheet, PDF

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MC74VHC1GT86DFT1G: DescriptionAHC/VHC SERIES, 2-INPUT XOR GATE, PDSO5; Categorylogic logic; File Size121KB，6 Pages; ManufacturerON Semiconductor; Websitehttp://www.onsemi.cn; Environmental Compliance

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MC74VHC1GT86DFT1G Overview

AHC/VHC SERIES, 2-INPUT XOR GATE, PDSO5

MC74VHC1GT86DFT1G Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	ON Semiconductor
Parts packaging code	SOT-353
package instruction	SC-88A, SC-70, SOT-353, 5 PIN
Contacts	5
Reach Compliance Code	compli
Is Samacsys	N
series	AHC/VHC
JESD-30 code	R-PDSO-G5
length	2 mm
Logic integrated circuit type	XOR GATE
Number of functions	1
Number of entries	2
Number of terminals	5
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
propagation delay (tpd)	19.5 ns
Certification status	Not Qualified
Maximum seat height	1.1 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	1.25 mm
Base Number Matches	1

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MC74VHC1GT86

2-Input Exclusive OR Gate /

CMOS Logic Level Shifter

with LSTTL−Compatible Inputs

The MC74VHC1GT86 is an advanced high speed CMOS 2−input

Exclusive OR gate fabricated with silicon gate CMOS technology. It

achieves high speed operation similar to equivalent Bipolar Schottky

TTL while maintaining CMOS low power dissipation.

The internal circuit is composed of three stages, including a buffer

output which provides high noise immunity and stable output.

The device input is compatible with TTL−type input thresholds and

the output has a full 5 V CMOS level output swing. The input protection

circuitry on this device allows overvoltage tolerance on the input,

allowing the device to be used as a logic−level translator from 3 V

CMOS logic to 5 V CMOS Logic or from 1.8 V CMOS logic to 3 V

CMOS Logic while operating at the high−voltage power supply.

The MC74VHC1GT86 input structure provides protection when

voltages up to 7 V are applied, regardless of the supply voltage. This

allows the MC74VHC1GT86 to be used to interface 5 V circuits to

3 V circuits. The output structures also provide protection when

= 0 V. These input and output structures help prevent device

destruction caused by supply voltage

−

input/output voltage mismatch,

battery backup, hot insertion, etc.

Features

http://onsemi.com

MARKING

DIAGRAMS

VM M

SC−88A / SOT−353 / SC−70

DF SUFFIX

CASE 419A

VM M

TSOP−5 / SOT−23 / SC−59

DT SUFFIX

CASE 483

= Device Code

= Date Code*

= Pb−Free Package

•

High Speed: t

= 4.8 ns (Typ) at V

= 5 V

Low Power Dissipation: I

= 1

(Max) at T

= 25°C

TTL−Compatible Inputs: V

= 0.8 V; V

= 2 V

CMOS−Compatible Outputs: V

> 0.8 V

; V

< 0.1 V

@Load

Power Down Protection Provided on Inputs and Outputs

Balanced Propagation Delays

Pin and Function Compatible with Other Standard Logic Families

Chip Complexity: FETs = 83; Equivalent Gates = 16

These Devices are Pb−Free and are RoHS Compliant

(Note: Microdot may be in either location)

*Date Code orientation and/or position may vary

depending upon manufacturing location.

PIN ASSIGNMENT

IN B

IN A

GND

OUT Y

IN B

IN A

GND

FUNCTION TABLE

Inputs

Output

OUT Y

Figure 1. Pinout

(Top View)

IN A

IN B

OUT Y

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

Figure 2. Logic Symbol

Semiconductor Components Industries, LLC, 2011

May, 2011

−

Rev. 16

Publication Order Number:

MC74VHC1GT86/D

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