SPP1021
Dual P-Channel Enhancement Mode MOSFET
DESCRIPTION
The SPP1021 is the Dual P-Channel enhancement mode
power field effect transistors are produced using high cell
density , DMOS trench technology. This high density
process is especially tailored to minimize on-state
resistance and provide superior switching performance.
These devices are particularly suited for low voltage
applications such as notebook computer power
management and other battery powered circuits where
high-side switching , low in-line power loss, and
resistance to transients are needed.
APPLICATIONS
Power Management in Note book
Portable Equipment
Battery Powered System
DC/DC Converter
Load Switch
DSC
LCD Display inverter
FEATURES
P-Channel
-20V/0.45A,R
DS(ON)
= 0.52Ω@V
GS
=-4.5V
-20V/0.35A,R
DS(ON)
= 0.70Ω@V
GS
=-2.5V
-20V/0.25A,R
DS(ON)
= 0.95Ω@V
GS
=-1.8V
Super high density cell design for extremely low
RDS (ON)
Exceptional on-resistance and maximum DC
current capability
SOT-563 (SC-89-6L) package design
PIN CONFIGURATION( SOT-563 / SC-89-6L)
PART MARKING
2012/07/04
Ver.1
Page 1
SPP1021
Dual P-Channel Enhancement Mode MOSFET
PIN DESCRIPTION
Pin
1
2
3
4
5
6
Symbol
S1
G1
D2
S2
G2
D1
Description
Source 1
Gate 1
Drain 2
Source 2
Gate 2
Drain1
ORDERING INFORMATION
Part Number
SPP1021S56RGB
Package
SOT-563
Part Marking
21
※
Week Code : A ~ Z( 1 ~ 26 ) ; a ~ z( 27 ~ 52 )
※
SPP1021S56RGB : Tape Reel ; Pb – Free ; Halogen – Free
ABSOULTE MAXIMUM RATINGS
(T
A
=25
℃
Unless otherwise noted)
Parameter
Drain-Source Voltage
Gate –Source Voltage
Continuous Drain Current(T
J
=150
℃
)
Pulsed Drain Current
Continuous Source Current(Diode Conduction)
Power Dissipation
Operating Junction Temperature
Storage Temperature Range
T
A
=25℃
T
A
=70℃
T
A
=25℃
T
A
=80℃
Symbol
V
DSS
V
GSS
I
D
I
DM
I
S
P
D
T
J
T
STG
Typical
Unit
-20
±12
-0.45
-0.35
-1.0
-0.3
0.35
0.19
-55/150
-55/150
V
V
A
A
A
W
℃
℃
2012/07/04
Ver.1
Page 2
SPP1021
Dual P-Channel Enhancement Mode MOSFET
ELECTRICAL CHARACTERISTICS
(T
A
=25
℃
Unless otherwise noted)
Parameter
Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate Leakage Current
Zero Gate Voltage Drain Current
On-State Drain Current
Drain-Source On-Resistance
Forward Transconductance
Diode Forward Voltage
Dynamic
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Time
Turn-Off Time
Symbol
Conditions
Min.
Typ
Max.
Unit
V
(BR)DSS
V
GS
=0V,I
D
=-250uA
V
GS(th)
V
DS
=V
GS
,I
D
=-250uA
I
GSS
I
DSS
I
D(on)
R
DS(on)
gfs
V
SD
V
DS
=0V,V
GS
=±12V
V
DS
=-20V,V
GS
=0V
V
DS
=-20V,V
GS
=0V
T
J
=55℃
V
DS
≤
-4.5V,V
GS
=-5V
V
GS
=-4.5V,I
D
=-0.45A
V
GS
=-2.5V,I
D
=-0.35A
V
GS
=-1.8V,I
D
=-0.25A
V
DS
=-10V,I
D
=-0.25A
I
S
=-0.15A,V
GS
=0V
-20
-0.35
-0.8
±30
-1
-5
-0.7
0.42
0.58
0.75
0.4
-0.8
0.52
0.70
0.95
-1.2
V
uA
uA
A
Ω
S
V
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
V
DD
=-10V,R
L
=10Ω ,
I
D
≡-0.4A
V
GEN
=-4.5V ,R
G
=6Ω
V
DS
=-10V,V
GS
=-4.5V ,I
D
≡-0.6A
1.5
0.3
0.35
5
15
8
1.4
2.0
nC
10
25
15
1.8
ns
2012/07/04
Ver.1
Page 3
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