iC-RC1000
SIN/COS SIGNAL SAFETY MONITOR IC
preliminar y
Rev B1, Page 1/10
FEATURES
o
Sine/cosine encoder signal monitoring for SIL applications
o
Suitable for differential encoder signals of 1 Vpp
(250 mV amplitude per line)
o
Suitable for single-ended signals (500 mV amplitude per line)
o
Monitor for input frequencies from 0 to 500 kHz
o
Verification of DC common mode range per signal line
o
Monitoring of Lissajous curve with min/max limits
o
Cable fracture detection
o
Source decoupling and overvoltage clamping per pin by
external resistors
o
Single-failure-proof dual channel concept
o
Independent diagnostic outputs:
signal OK message and signal error message
APPLICATIONS
o
Sensor monitoring
o
Motion control
o
Functional safety
PACKAGES
MSOP10
BLOCK DIAGRAM
iC-RC1000
PSIN
1.2V
sin
2
+cos
2
0.8V
DC Check
OK Channel
OK
&
VCC
Monitor
VCC Monitor
NSIN
VCC1
GND
iC-RC1000
PCOS
1.2V
sin
2
+cos
2
0.8V
Signal
Splitter
DC Check
ERR Channel
ERR
≥1
VCC
Monitor
NCOS
VCC2
GND
iC-Haus GmbH – Integrated Circuits
Oxana Schmalz
16
Copyright © 2012 iC-Haus
http://www.ichaus.com
iC-RC1000
SIN/COS SIGNAL SAFETY MONITOR IC
preliminar y
Rev B1, Page 2/10
DESCRIPTION
iC-RC1000 acts as an independent monitoring de-
vice for industrial safety controllers and drive systems
in the evaluation of sine encoders for SIL applica-
tions.
In this function the IC checks that four analog signal
lines have the correct DC voltage range (DC range:
30 to 80 % from VCC1 or VCC2) and that two respec-
tive paired lines have the correct differential 1 Vpp
signal amplitude in real time (amplitude range: 200
to 300 mV). Signals with twice this amplitude (400 to
600 mV) referenced to ground can also be monitored;
here, the negative input must be kept within the per-
missible DC range (e.g. VCC/2).
iC-RC1000 has intrinsic safety, enabling single er-
rors to be securely identified through redundancy; in-
dependently of one another, two different diagnostic
channels monitor the input signals, outputting sepa-
rate messages. The Signal OK and the Signal er-
ror statuses are complementary to one another if the
chip is functioning correctly.
Each diagnostic channel has signal comparators
for DC and square sum monitoring; the monitoring
windows have a different design depending on the
good/bad diagnosis. The square sum monitor uses
an analog multiplier and calculates the Lissajous
curve derived from the square signal by the sine and
cosine (sin(wt)
2
+ cos(wt)
2
).
So that the external controller can safely detect an
interrupt, the status times are extended to at least
10 ms by retriggerable monoflops. After power on iC-
RC1000 starts in Signal error status, setting the Sig-
nal OK status at the earliest after the monoflop pe-
riod has elapsed. The status outputs are configured
as push-pull drivers so that optocouplers can be di-
rectly connected up to the device (10 mA low side,
4 mA high side).
The front end signal splitter isolates the two diagnos-
tic channels from one another and provides protec-
tion against overvoltage with the help of external re-
sistors (39 kΩ at each signal input). The integrated
clamp circuit then reduces the input voltage to within
the permissible range. At the same time this de-
couples the signal source so that a controller can
simulate an error by loading an input pin. So that
signal failures can be detected should there be a
fractured cable, for example, integrated pull-down re-
sistors (2.5 MΩ) drag the DC potential into the error
range.
iC-RC1000 works with a supply voltage of 5 V. The
diagnostic channels can be supplied by one or two
separate power packs and mutually monitor the ap-
plied supply voltage. The device is protected against
ESD and in the given circuit is overvoltage-proof at
the front end up to 36 V.
iC-RC1000
SIN/COS SIGNAL SAFETY MONITOR IC
preliminar y
Rev B1, Page 5/10
ABSOLUTE MAXIMUM RATINGS
These ratings do not imply permissible operating conditions; functional operation is not guaranteed.
Exceeding these ratings may damage the device.
Item
No.
Symbol
Parameter
Voltage at VCC1, VCC2
Current in VCC1, VCC2
Voltage at PSIN, NSIN, PCOS, NCOS
Current in PSIN, NSIN, PCOS, NCOS
Voltage at ERR, OK
Current in ERR, OK
Pulse Current in all pins
(latch-up susceptibility)
according to Jedec Standard No. 78;
Ta = 25 °C, pulse duration to 10 ms,
VCC1 = VCC1
max
, VCC2 = VCC2
max
,
Vlu() = (-0.5...+1.5) x Vpin()
max
HBM 100pF discharged through 1.5 kΩ
Conditions
Min.
-0.3
-10
-0.3
-10
-0.3
-10
-100
Max.
7
25
7
10
7
25
100
V
mA
V
mA
V
mA
mA
Unit
G001 V(VCC)
G002 I(VCC)
G003 Vin()
G004 Iin()
G005 Vout()
G006 Iout()
G007 Ilu()
G008 Vd()
ESD Susceptibility at all pins
2
kV
THERMAL DATA
Operating conditions: VCC1 = 5 V ±10 %, VCC2 = 5 V ±10 %
Item
No.
T01
T02
Symbol
Ta
Rthja
Parameter
Operating Ambient Temperature Range
(extended range on request)
Thermal Resistance Chip to Ambient
Conditions
Min.
-40
30
Typ.
Max.
110
°C
K/W
Unit
All voltages are referenced to ground unless otherwise stated.
All currents flowing into the device pins are positive; all currents flowing out of the device pins are negative.
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