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HIP2100
Data Sheet
April 2, 2010
FN4022.14
100V/2A Peak, Low Cost, High Frequency
Half Bridge Driver
The HIP2100 is a high frequency, 100V Half Bridge
N-Channel power MOSFET driver IC. The low-side and
high-side gate drivers are independently controlled and
matched to 8ns. This gives the user maximum flexibility in
dead-time selection and driver protocol. Undervoltage
protection on both the low-side and high-side supplies force
the outputs low. An on-chip diode eliminates the discrete
diode required with other driver ICs. A new level-shifter
topology yields the low-power benefits of pulsed operation
with the safety of DC operation. Unlike some competitors,
the high-side output returns to its correct state after a
momentary undervoltage of the high-side supply.
Features
• Drives N-Channel MOSFET Half Bridge
• SOIC, EPSOIC, QFN and DFN Package Options
• SOIC, EPSOIC and DFN Packages Compliant with 100V
Conductor Spacing Guidelines of IPC-2221
• Pb-Free Product Available (RoHS Compliant)
• Bootstrap Supply Max Voltage to 114VDC
• On-Chip 1Ω Bootstrap Diode
• Fast Propagation Times for Multi-MHz Circuits
• Drives 1000pF Load with Rise and Fall Times Typ. 10ns
• CMOS Input Thresholds for Improved Noise Immunity
• Independent Inputs for Non-Half Bridge Topologies
• No Start-Up Problems
Ordering Information
PART
NUMBER
(Note 1)
HIP2100IB
HIP2100IBZ
(Note 2)
PART
MARKING
2100 IB
2100 IBZ
TEMP.
RANGE
(°C)
PACKAGE
PKG.
DWG. #
M8.15
M8.15
M8.15C
• Outputs Unaffected by Supply Glitches, HS Ringing Below
Ground, or HS Slewing at High dv/dt
• Low Power Consumption
• Wide Supply Range
• Supply Undervoltage Protection
• 3Ω Driver Output Resistance
• QFN/DFN Package:
- Compliant to JEDEC PUB95 MO-220
QFN - Quad Flat No Leads - Package Outline
- Near Chip Scale Package Footprint, which Improves
PCB Efficiency and has a Thinner Profile
-40 to +125 8 Ld SOIC
-40 to +125 8 Ld SOIC
(Pb-free)
-40 to +125 8 Ld EPSOIC
(Pb-free)
HIP2100EIBZ 2100 EIBZ
(Note 2)
HIP2100IRZ
(Note 2)
HIP 2100IRZ
-40 to +125 16 Ld 5x5 QFN L16.5x5
(Pb-free)
-40 to +125 12 Ld 4x4 DFN L12.4x4A
(Pb-free)
HIP2100IR4Z 21 00IR4Z
(Note 2)
NOTES:
1. Add “-T” suffix for tape and reel. Please refer to TB347 for details on
reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-
free material sets, molding compounds/die attach materials, and
100% matte tin plate plus anneal (e3 termination finish, which is
RoHS compliant and compatible with both SnPb and Pb-free
soldering operations). Intersil Pb-free products are MSL classified
at Pb-free peak reflow temperatures that meet or exceed the Pb-
free requirements of IPC/JEDEC J STD-020.
Applications
• Telecom Half Bridge Power Supplies
• Avionics DC/DC Converters
• Two-Switch Forward Converters
• Active Clamp Forward Converters
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004, 2010. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
HIP2100
Pinouts
HIP2100
(8 LD SOIC, EPSOIC)
TOP VIEW
V
DD
HB
HO
HS
1
2
3
4
EPAD
8
7
6
5
LO
V
SS
LI
HI
V
DD
NC
NC
HB
HO
HS
1
2
3
4
5
6
EPAD
HIP2100IR4
(12 LD DFN)
TOP VIEW
12 LO
11 V
SS
10 NC
9
8
7
NC
LI
HI
NC 1
HB 2
HIP2100
(16 LD QFN)
TOP VIEW
V
DD
NC
NC
13
12 NC
EPAD
HO 3
NC 4
5
NC
6
HS
7
HI
8
NC
11 V
SS
10 LI
9
NC
LO
14
16
15
NOTE: EPAD = Exposed PAD.
Application Block Diagram
+12V
+100V
V
DD
HB
SECONDARY
CIRCUIT
HI
CONTROL
PWM
CONTROLLER
LI
DRIVE
HI
HO
HS
DRIVE
LO
LO
HIP2100
V
SS
REFERENCE
AND
ISOLATION
2
FN4022.14
HIP2100
Functional Block Diagram
HB
V
DD
UNDER
VOLTAGE
LEVEL SHIFT
DRIVER
HS
HI
HO
UNDER
VOLTAGE
DRIVER
LI
V
SS
LO
EPAD (EPSOIC, QFN and DFN PACKAGES ONLY)
*EPAD = Exposed Pad. The EPAD is electrically isolated from all other pins. For best
thermal performance connect the EPAD to the PCB power ground plane.
+48V
+12V
PWM
HIP2100
SECONDARY
CIRCUIT
ISOLATION
FIGURE 1. TWO-SWITCH FORWARD CONVERTER
+48V
+12V
SECONDARY
CIRCUIT
PWM
HIP2100
ISOLATION
FIGURE 2. FORWARD CONVERTER WITH AN ACTIVE CLAMP
3
FN4022.14
HIP2100
Absolute Maximum Ratings
Supply Voltage, V
DD,
V
HB
-V
HS
(Notes 3, 4) . . . . . . . . -0.3V to 18V
LI and HI Voltages (Note 4) . . . . . . . . . . . . . . . . -0.3V to V
DD
+0.3V
Voltage on LO (Note 4) . . . . . . . . . . . . . . . . . . . -0.3V to V
DD
+0.3V
Voltage on HO (Note 4) . . . . . . . . . . . . . . . V
HS
-0.3V to V
HB
+0.3V
Voltage on HS (Continuous) (Note 4) . . . . . . . . . . . . . . -1V to 110V
Voltage on HB (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +118V
Average Current in V
DD
to HB diode . . . . . . . . . . . . . . . . . . . 100mA
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1 (1kV)
Thermal Information
Thermal Resistance (Typical)
θ
JA
(°C/W)
θ
JC
(°C/W)
SOIC (Note 5) . . . . . . . . . . . . . . . . . . .
95
50
EPSOIC (Note 6) . . . . . . . . . . . . . . . . .
40
3.0
QFN (Note 6) . . . . . . . . . . . . . . . . . . . .
37
6.5
DFN (Note 6) . . . . . . . . . . . . . . . . . . . .
40
3.0
Max Power Dissipation at +25°C in Free Air (SOIC, Note 5) . . . . 1.3W
Max Power Dissipation at +25°C in Free Air (EPSOIC, Note 6) . . 3.1W
Max Power Dissipation at +25°C in Free Air (QFN, Note 6) . . . . . 3.3W
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Junction Temperature Range. . . . . . . . . . . . . . . . . .-55°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Maximum Recommended Operating Conditions
Supply Voltage, V
DD
. . . . . . . . . . . . . . . . . . . . . . . . +9V to 14.0VDC
Voltage on HS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1V to 100V
Voltage on HS. . . . . . . . . . . . . . . .(Repetitive Transient) -5V to 105V
Voltage on HB . . . V
HS
+8V to V
HS
+14.0V and V
DD
-1V to V
DD
+100V
HS Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <50V/ns
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
3. The HIP2100 is capable of derated operation at supply voltages exceeding 14V. Figure 16 shows the high-side voltage derating curve for this
mode of operation.
4. All voltages referenced to V
SS
unless otherwise specified.
5.
θ
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
6.
θ
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features.
θ
JC,
the
“case temp” is measured at the center of the exposed metal pad on the package underside. See Tech Brief TB379.
Electrical Specifications
V
DD
= V
HB
= 12V, V
SS
= V
HS
= 0V, No Load on LO or HO, Unless Otherwise Specified.
T
J
= +25°C
T
J
= -40°C TO +125°C
MIN
(Note 7)
MAX
(Note 7)
UNITS
PARAMETERS
SUPPLY CURRENTS
V
DD
Quiescent Current
V
DD
Operating Current
Total HB Quiescent Current
Total HB Operating Current
HB to V
SS
Current, Quiescent
HB to V
SS
Current, Operating
INPUT PINS
Low Level Input Voltage Threshold
High Level Input Voltage Threshold
Input Voltage Hysteresis
Input Pulldown Resistance
UNDERVOLTAGE PROTECTION
V
DD
Rising Threshold
V
DD
Threshold Hysteresis
HB Rising Threshold
HB Threshold Hysteresis
SYMBOL
TEST CONDITIONS
MIN TYP MAX
I
DD
I
DDO
I
HB
I
HBO
I
HBS
I
HBSO
LI = HI = 0V
f = 500kHz
LI = HI = 0V
f = 500kHz
V
HS
= V
HB
= 114V
f = 500kHz
-
-
-
-
-
-
0.1
1.5
0.1
1.5
0.05
0.7
0.15
2.5
0.15
2.5
1
-
-
-
-
-
-
-
0.2
3
0.2
3
10
-
mA
mA
mA
mA
µA
mA
V
IL
V
IH
V
IHYS
R
I
4
-
-
-
5.4
5.8
0.4
200
-
7
-
-
3
-
-
100
-
8
-
500
V
V
V
kΩ
V
DDR
V
DDH
V
HBR
V
HBH
7
-
6.5
-
7.3
0.5
6.9
0.4
7.8
-
7.5
-
6.5
-
6
-
8
-
8
-
V
V
V
V
4
FN4022.14
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