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KM48C512DJ-L6

Description
Fast Page DRAM, 512KX8, 60ns, CMOS, PDSO28, 0.400 INCH, SOJ-28
Categorystorage    storage   
File Size366KB,20 Pages
ManufacturerSAMSUNG
Websitehttp://www.samsung.com/Products/Semiconductor/
Download Datasheet Parametric View All

KM48C512DJ-L6 Overview

Fast Page DRAM, 512KX8, 60ns, CMOS, PDSO28, 0.400 INCH, SOJ-28

KM48C512DJ-L6 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerSAMSUNG
Parts packaging codeSOJ
package instructionSOJ, SOJ28,.44
Contacts28
Reach Compliance Codeunknown
ECCN codeEAR99
access modeFAST PAGE
Maximum access time60 ns
Other featuresRAS ONLY/CAS BEFORE RAS/HIDDEN/SELF REFRESH
I/O typeCOMMON
JESD-30 codeR-PDSO-J28
JESD-609 codee0
length18.42 mm
memory density4194304 bit
Memory IC TypeFAST PAGE DRAM
memory width8
Number of functions1
Number of ports1
Number of terminals28
word count524288 words
character code512000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize512KX8
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeSOJ
Encapsulate equivalent codeSOJ28,.44
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Certification statusNot Qualified
refresh cycle1024
Maximum seat height3.76 mm
self refreshYES
Maximum standby current0.00015 A
Maximum slew rate0.07 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width10.16 mm
KM48C512D, KM48V512D
CMOS DRAM
512K x 8Bit CMOS Dynamic RAM with Fast Page Mode
DESCRIPTION
This is a family of 524,288 x 8 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells
within the same row. Power supply voltage(+5.0V or +3.3V), Access time(-5,-6,-7), power consumption(Normal or Low power) and
package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and
Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 512Kx8 Fast Page Mode DRAM family is
fabricated using Samsung′s advanced CMOS process to realize high band-width, low power consumption and high reliability.
It may be used as main memory unit for microcomputer, personal computer and portable machines.
• Fast Page Mode operation
FEATURES
• Part Identification
- KM48C512D/DL (5V, 1K Ref.)
- KM48V512D/DL (3.3V, 1K Ref.)
Active Power Dissipation
Unit : mW
Speed
-5
-6
-7
3.3V (1K Ref.)
-
255
235
5V (1K Ref.)
470
385
360
• Byte Read/Write operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (L-ver only)
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• Available in 28-pin SOJ 400mil & TSOP(II) 400mil
packages
• Dual +5V±10% power supply(5V product)
• Dual +3.3V±0.3V power supply(3.3V product)
Refresh Cycles
Part
NO.
C512D
V512D
V
CC
5V
3.3V
Refresh
cycle
1K
Refresh period
Normal
16ms
L-ver
128ms
RAS
CAS
W
FUNCTIONAL BLOCK DIAGRAM
Control
Clocks
Vcc
Vss
VBB Generator
Performance Range
Speed
-5
-6
-7
Refresh Timer
Row Decoder
Sense Amps & I/O
Data in
Buffer
t
RAC
50ns
60ns
70ns
t
CAC
15ns
15ns
20ns
t
RC
90ns
110ns
130ns
t
PC
35ns
40ns
45ns
Remark
5V Only
5V/3.3V
5V/3.3V
A0 - A9
A0 - A8
Refresh Control
Refresh Counter
Row Address Buffer
Col. Address Buffer
Column Decoder
Memory Array
524,288 x8
Cells
DQ0
to
DQ7
Data out
Buffer
OE
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.
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