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UPA821

Description
NPN SILICON EPITAXIAL TWIN TRANSISTOR WITH BUILT-IN 2 x 2SC5006 FLAT-LEAD 6-PIN THIN-TYPE ULTRA SUPER MINIMOLD
File Size50KB,12 Pages
ManufacturerNEC ( Renesas )
Websitehttps://www2.renesas.cn/zh-cn/
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UPA821 Overview

NPN SILICON EPITAXIAL TWIN TRANSISTOR WITH BUILT-IN 2 x 2SC5006 FLAT-LEAD 6-PIN THIN-TYPE ULTRA SUPER MINIMOLD

DATA SHEET
NPN SILICON RF TWIN TRANSISTOR
µ
PA821TC
NPN SILICON EPITAXIAL TWIN TRANSISTOR
(WITH BUILT-IN 2
×
2SC5006)
FLAT-LEAD 6-PIN THIN-TYPE ULTRA SUPER MINIMOLD
DESCRIPTION
The
µ
PA821TC has built-in low-voltage two transistors which are designed for low-noise amplification in the VHF to
UHF band.
FEATURES
• Low noise: NF= 1.2 dB TYP.@ f = 1 GHz, V
CE
= 3 V, I
C
= 7 mA
• High gain: IS
21e
l
2
= 9.0 dB TYP. @ f = 1 GHz, V
CE
= 3 V, I
C
= 7 mA
• Flat-lead 6-pin thin-type ultra super minimold package
Built-in 2 transistors (2
×
2SC5006)
ORDERING INFORMATION
Part Number
Package
Flat-lead 6-pin
thin-type ultra
super minimold
Quantity
Loose products
(50 pcs)
Taping products
(3 kp/reel)
Supplying Form
Embossed tape 8 mm wide.
Pin 6 (Q1 Base), Pin 5 (Q2 Emitter), Pin 4 (Q2 Base) face to perforation
side of the tape.
µ
PA821TC
µ
PA821TC-T1
Remark
To order evaluation samples, please contact your local NEC sales office. (Part number for sample order:
µ
PA821TC. Unit sample quantity is 50 pcs).
ABSOLUTE MAXIMUM RATINGS (T
A
= +25°C)
°
Parameter
Collector to Base Voltage
Collector to Emitter Voltage
Emitter to Base Voltage
Collector Current
Total Power Dissipation
Symbol
V
CBO
V
CEO
V
EBO
I
C
P
T
Note
Ratings
20
12
3
100
200 in 1 element
230 in 2 elements
150
−65
to 150
Unit
V
V
V
mA
mW
Junction Temperature
Storage Temperature
T
j
T
stg
°C
°C
2
Note
Mounted on 1.08 cm
×
1.0 mm glass epoxy substrate.
Caution Electro-static sensitive devices.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. P14552EJ1V0DS00 (1st edition)
Date Published November 1999 N CP(K)
Printed in Japan
©
1999

UPA821 Related Products

UPA821 UPA821TC-T1 UPA821TC
Description NPN SILICON EPITAXIAL TWIN TRANSISTOR WITH BUILT-IN 2 x 2SC5006 FLAT-LEAD 6-PIN THIN-TYPE ULTRA SUPER MINIMOLD NPN SILICON EPITAXIAL TWIN TRANSISTOR WITH BUILT-IN 2 x 2SC5006 FLAT-LEAD 6-PIN THIN-TYPE ULTRA SUPER MINIMOLD NPN SILICON EPITAXIAL TWIN TRANSISTOR WITH BUILT-IN 2 x 2SC5006 FLAT-LEAD 6-PIN THIN-TYPE ULTRA SUPER MINIMOLD

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