HD74LS92FP datasheet, PDF - EEWORLD Datasheet

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HD74LS92FP: DescriptionLS SERIES, ASYN NEGATIVE EDGE TRIGGERED 3-BIT UP DIVIDE BY 12 COUNTER, PDSO14, FP-14DA; Categorylogic logic; File Size85KB，7 Pages; ManufacturerRenesas Electronics Corporation; Websitehttps://www.renesas.com/

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HD74LS92FP Overview

LS SERIES, ASYN NEGATIVE EDGE TRIGGERED 3-BIT UP DIVIDE BY 12 COUNTER, PDSO14, FP-14DA

HD74LS92FP Parametric

Parameter Name	Attribute value
Maker	Renesas Electronics Corporation
Parts packaging code	SOIC
package instruction	SOP,
Contacts	14
Reach Compliance Code	unknown
Counting direction	UP
series	LS
JESD-30 code	R-PDSO-G14
length	10.06 mm
Load/preset input	YES
Logic integrated circuit type	DIVIDE BY 12 COUNTER
Operating mode	ASYNCHRONOUS
Number of digits	3
Number of functions	2
Number of terminals	14
Maximum operating temperature	75 °C
Minimum operating temperature	-20 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
propagation delay (tpd)	50 ns
Certification status	Not Qualified
Maximum seat height	2.2 mm
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	TTL
Temperature level	COMMERCIAL EXTENDED
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Trigger type	NEGATIVE EDGE
width	5.5 mm
minfmax	32 MHz

HD74LS92FP Preview

Unit: mm

19.20

20.32 Max

14

8

6.30

7.40 Max

1

2.39 Max

1.30

7

7.62

0.51 Min

2.54 Min 5.06 Max

2.54

±

0.25

0.48

±

0.10

0.25

– 0.05

0° – 15°

+ 0.10

Hitachi Code

JEDEC

EIAJ

Weight (reference value)

DP-14

Conforms

0.97 g

Unit: mm

10.06

10.5 Max

14

8

5.5

1

7

*0.22

±

0.05

0.20

±

0.04

2.20 Max

0.20

7.80

+ 0.30

–

1.42 Max

1.15

0° – 8°

1.27

*0.42

±

0.08

0.40

±

0.06

0.10

±

0.10

0.70

±

0.20

0.15

0.12

M

Hitachi Code

JEDEC

EIAJ

Weight (reference value)

FP-14DA

—

Conforms

0.23 g

*Dimension including the plating thickness

Base material dimension

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HD74LS92FP Related Products

	HD74LS92FP	HD74LS92P	HD74LS92RP
Description	LS SERIES, ASYN NEGATIVE EDGE TRIGGERED 3-BIT UP DIVIDE BY 12 COUNTER, PDSO14, FP-14DA	LS SERIES, ASYN NEGATIVE EDGE TRIGGERED 3-BIT UP DIVIDE BY 12 COUNTER, PDIP14, DP-14	LS SERIES, ASYN NEGATIVE EDGE TRIGGERED 3-BIT UP DIVIDE BY 12 COUNTER, PDSO14, FP-14DN
Maker	Renesas Electronics Corporation	Renesas Electronics Corporation	Renesas Electronics Corporation
Parts packaging code	SOIC	DIP	SOIC
package instruction	SOP,	DP-14	SOP,
Contacts	14	14	14
Reach Compliance Code	unknown	compliant	compliant
Counting direction	UP	UP	UP
series	LS	LS	LS
JESD-30 code	R-PDSO-G14	R-PDIP-T14	R-PDSO-G14
length	10.06 mm	19.2 mm	8.65 mm
Load/preset input	YES	NO	YES
Logic integrated circuit type	DIVIDE BY 12 COUNTER	DIVIDE BY 12 COUNTER	DIVIDE BY 12 COUNTER
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
Number of digits	3	3	3
Number of functions	2	2	2
Number of terminals	14	14	14
Maximum operating temperature	75 °C	75 °C	75 °C
Minimum operating temperature	-20 °C	-20 °C	-20 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	DIP	SOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	IN-LINE	SMALL OUTLINE
propagation delay (tpd)	50 ns	50 ns	50 ns
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	2.2 mm	5.06 mm	1.75 mm
Nominal supply voltage (Vsup)	5 V	5 V	5 V
surface mount	YES	NO	YES
technology	TTL	TTL	TTL
Temperature level	COMMERCIAL EXTENDED	COMMERCIAL EXTENDED	COMMERCIAL EXTENDED
Terminal form	GULL WING	THROUGH-HOLE	GULL WING
Terminal pitch	1.27 mm	2.54 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL
Trigger type	NEGATIVE EDGE	NEGATIVE EDGE	NEGATIVE EDGE
width	5.5 mm	7.62 mm	3.9 mm
minfmax	32 MHz	32 MHz	32 MHz
Is it lead-free?	-	Contains lead	Contains lead
Is it Rohs certified?	-	incompatible	incompatible
JESD-609 code	-	e0	e0
Peak Reflow Temperature (Celsius)	-	NOT SPECIFIED	NOT SPECIFIED
Terminal surface	-	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Maximum time at peak reflow temperature	-	NOT SPECIFIED	NOT SPECIFIED

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